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Roll out r126169 and r126170 in an attempt to fix the selfhost bot. 

llvm-svn: 126185
This commit is contained in:
Cameron Zwarich 2011-02-22 03:24:52 +00:00
parent 6cd5ae4dfa
commit f8b22b3483
5 changed files with 11 additions and 112 deletions
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20
llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
View File

@ -101,30 +101,14 @@ public:
#endif
struct LiveOutInfo {
unsigned NumSignBits : 31;
bool IsValid : 1;
unsigned NumSignBits;
APInt KnownOne, KnownZero;
LiveOutInfo() : NumSignBits(0), IsValid(false), KnownOne(1, 0),
KnownZero(1, 0) {}
LiveOutInfo() : NumSignBits(0), KnownOne(1, 0), KnownZero(1, 0) {}
};
/// LiveOutRegInfo - Information about live out vregs.
IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
/// VisitedBBs - Basic blocks that have been visited by reverse postorder.
DenseSet<const BasicBlock*> VisitedBBs;
/// AllPredsVisited - Tracks whether all predecessors of the current basic
/// block have already been visited.
bool AllPredsVisited;
/// PHIDestRegs - Virtual registers that are the destinations of PHIs.
DenseSet<unsigned> PHIDestRegs;
/// PHISrcToDestMap - Maps the virtual register defining a PHI's source to the
/// virtual register defining its destination.
DenseMap<unsigned, unsigned> PHISrcToDestMap;
/// PHINodesToUpdate - A list of phi instructions whose operand list will
/// be updated after processing the current basic block.
/// TODO: This isn't per-function state, it's per-basic-block state. But

8
llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
View File

@ -127,13 +127,10 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf) {
for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I) {
// Mark values used outside their block as exported, by allocating
// a virtual register for them.
if (!EnableFastISel && isa<PHINode>(I)) {
PHIDestRegs.insert(InitializeRegForValue(I));
} else if (isUsedOutsideOfDefiningBlock(I)) {
if (isUsedOutsideOfDefiningBlock(I))
if (!isa<AllocaInst>(I) ||
!StaticAllocaMap.count(cast<AllocaInst>(I)))
InitializeRegForValue(I);
}
// Collect llvm.dbg.declare information. This is done now instead of
// during the initial isel pass through the IR so that it is done
@ -222,9 +219,6 @@ void FunctionLoweringInfo::clear() {
CatchInfoFound.clear();
#endif
LiveOutRegInfo.clear();
VisitedBBs.clear();
PHIDestRegs.clear();
PHISrcToDestMap.clear();
ArgDbgValues.clear();
ByValArgFrameIndexMap.clear();
RegFixups.clear();

8
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View File

@ -644,10 +644,7 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
!RegisterVT.isInteger() || RegisterVT.isVector() ||
!FuncInfo.LiveOutRegInfo.inBounds(Regs[Part+i]))
continue;
if (FuncInfo.PHIDestRegs.count(Regs[Part+i]) && !FuncInfo.AllPredsVisited)
continue;
const FunctionLoweringInfo::LiveOutInfo &LOI =
FuncInfo.LiveOutRegInfo[Regs[Part+i]];
@ -6469,9 +6466,6 @@ SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) {
}
}
if (!EnableFastISel)
FuncInfo.PHISrcToDestMap[Reg] = FuncInfo.ValueMap[PN];
// Remember that this register needs to added to the machine PHI node as
// the input for this MBB.
SmallVector<EVT, 4> ValueVTs;

52
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -49,7 +49,6 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Timer.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/Statistic.h"
#include <algorithm>
using namespace llvm;
@ -471,13 +470,6 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo() {
if (!TargetRegisterInfo::isVirtualRegister(DestReg))
continue;
bool IsPHI = false;
DenseMap<unsigned, unsigned>::const_iterator It = FuncInfo->PHISrcToDestMap.find(DestReg);
if (It != FuncInfo->PHISrcToDestMap.end()) {
IsPHI = true;
DestReg = It->second;
}
// Ignore non-scalar or non-integer values.
SDValue Src = N->getOperand(2);
EVT SrcVT = Src.getValueType();
@ -489,27 +481,14 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo() {
CurDAG->ComputeMaskedBits(Src, Mask, KnownZero, KnownOne);
// Only install this information if it tells us something.
if (!IsPHI && NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
continue;
FuncInfo->LiveOutRegInfo.grow(DestReg);
FunctionLoweringInfo::LiveOutInfo &LOI = FuncInfo->LiveOutRegInfo[DestReg];
// If this is a PHI and there is existing information, merge it with the
// information from this block.
if (IsPHI && LOI.IsValid) {
if (NumSignBits != 1 || KnownZero != 0 || KnownOne != 0) {
FuncInfo->LiveOutRegInfo.grow(DestReg);
FunctionLoweringInfo::LiveOutInfo &LOI =
FuncInfo->LiveOutRegInfo[DestReg];
LOI.NumSignBits = std::min(LOI.NumSignBits, NumSignBits);
LOI.KnownOne &= KnownOne;
LOI.KnownZero &= KnownZero;
continue;
LOI.NumSignBits = NumSignBits;
LOI.KnownOne = KnownOne;
LOI.KnownZero = KnownZero;
}
LOI.NumSignBits = NumSignBits;
LOI.KnownOne = KnownOne;
LOI.KnownZero = KnownZero;
LOI.IsValid = true;
} while (!Worklist.empty());
}
@ -853,28 +832,11 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
FastIS = TLI.createFastISel(*FuncInfo);
// Iterate over all basic blocks in the function.
ReversePostOrderTraversal<const Function*> RPOT(&Fn);
for (ReversePostOrderTraversal<const Function*>::rpo_iterator
I = RPOT.begin(), E = RPOT.end(); I != E; ++I) {
const BasicBlock *LLVMBB = *I;
for (Function::const_iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
const BasicBlock *LLVMBB = &*I;
#ifndef NDEBUG
CheckLineNumbers(LLVMBB);
#endif
if (EnableFastISel) {
FuncInfo->AllPredsVisited = false;
} else {
FuncInfo->AllPredsVisited = true;
for (const_pred_iterator PI = pred_begin(LLVMBB), PE = pred_end(LLVMBB);
PI != PE; ++PI) {
if (!FuncInfo->VisitedBBs.count(*PI)) {
FuncInfo->AllPredsVisited = false;
break;
}
}
FuncInfo->VisitedBBs.insert(LLVMBB);
}
FuncInfo->MBB = FuncInfo->MBBMap[LLVMBB];
FuncInfo->InsertPt = FuncInfo->MBB->getFirstNonPHI();

35
llvm/test/CodeGen/X86/phi-constants.ll
View File

@ -1,35 +0,0 @@
; RUN: llc < %s -march=x86-64 | FileCheck %s
%"class.std::bitset" = type { [8 x i8] }
define zeroext i1 @_Z3fooPjmS_mRSt6bitsetILm32EE(i32* nocapture %a, i64 %asize, i32* nocapture %b, i64 %bsize, %"class.std::bitset"* %bits) nounwind readonly ssp noredzone {
entry:
%tmp.i.i.i.i = bitcast %"class.std::bitset"* %bits to i64*
br label %for.cond
for.cond: ; preds = %for.inc, %entry
%0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
%conv = zext i32 %0 to i64
%cmp = icmp eq i64 %conv, %bsize
br i1 %cmp, label %return, label %for.body
for.body: ; preds = %for.cond
%arrayidx = getelementptr inbounds i32* %b, i64 %conv
%tmp5 = load i32* %arrayidx, align 4
%conv6 = zext i32 %tmp5 to i64
%rem.i.i.i.i = and i64 %conv6, 63
%tmp3.i = load i64* %tmp.i.i.i.i, align 8
%shl.i.i = shl i64 1, %rem.i.i.i.i
%and.i = and i64 %shl.i.i, %tmp3.i
%cmp.i = icmp eq i64 %and.i, 0
br i1 %cmp.i, label %for.inc, label %return
for.inc: ; preds = %for.body
%inc = add i32 %0, 1
br label %for.cond
return: ; preds = %for.body, %for.cond
; CHECK-NOT: and
%retval.0 = phi i1 [ true, %for.body ], [ false, %for.cond ]
ret i1 %retval.0
}