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[X86] Use VR512_0_15RegClass intead of VR512RegClass in X86VZeroUpper. 

This pass is only concerned with ZMM0-15 and YMM0-15. For YMM
we use VR256 which only contains YMM0-15, but for ZMM we were
using VR512 which contains ZMM0-31. Using VR512_0_15 is more
correct.

Given that the ABI and register allocator will use registers in
order, its unlikely that register from 16-31 would be used
without also using 0-15. So this probably doesn't functionally
matter.

llvm-svn: 372933
This commit is contained in:
Craig Topper 2019-09-25 23:25:15 +00:00
parent 6720ed851b
commit f8804047af
1 changed files with 2 additions and 4 deletions
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6
llvm/lib/Target/X86/X86VZeroUpper.cpp
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@ -292,8 +292,7 @@ bool VZeroUpperInserter::runOnMachineFunction(MachineFunction &MF) {
// need to insert any VZEROUPPER instructions. This is constant-time, so it
// is cheap in the common case of no ymm/zmm use.
bool YmmOrZmmUsed = FnHasLiveInYmmOrZmm;
const TargetRegisterClass *RCs[2] = {&X86::VR256RegClass, &X86::VR512RegClass};
for (auto *RC : RCs) {
for (auto *RC : {&X86::VR256RegClass, &X86::VR512_0_15RegClass}) {
if (!YmmOrZmmUsed) {
for (TargetRegisterClass::iterator i = RC->begin(), e = RC->end(); i != e;
i++) {
@ -304,9 +303,8 @@ bool VZeroUpperInserter::runOnMachineFunction(MachineFunction &MF) {
}
}
}
if (!YmmOrZmmUsed) {
if (!YmmOrZmmUsed)
return false;
}
assert(BlockStates.empty() && DirtySuccessors.empty() &&
"X86VZeroUpper state should be clear");