RegisterCoalescer: Fix joinReservedPhysReg()
joinReservedPhysReg() can only deal with a liverange in a single basic block when copying from a vreg into a physreg. See also rdar://30306405 Differential Revision: https://reviews.llvm.org/D29436 llvm-svn: 294268
This commit is contained in:
Matthias Braun
parent
346542b769
commit
f80403d8ee
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@ -1810,6 +1810,11 @@ bool RegisterCoalescer::joinReservedPhysReg(CoalescerPair &CP) {
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return false;
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}
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if (!LIS->intervalIsInOneMBB(RHS)) {
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DEBUG(dbgs() << "\t\tComplex control flow!\n");
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return false;
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}
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MachineInstr &DestMI = *MRI->getVRegDef(SrcReg);
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CopyMI = &*MRI->use_instr_nodbg_begin(SrcReg);
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SlotIndex CopyRegIdx = LIS->getInstructionIndex(*CopyMI).getRegSlot();
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@ -2,40 +2,33 @@
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--- |
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declare void @f2()
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define void @func() { ret void }
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define void @func0() { ret void }
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define void @func1() { ret void }
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define void @func2() { ret void }
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...
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---
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# Check coalescing of COPYs from reserved physregs.
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# CHECK-LABEL: name: func
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name: func
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registers:
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- { id: 0, class: gpr32 }
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- { id: 1, class: gpr64 }
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- { id: 2, class: gpr64 }
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- { id: 3, class: gpr32 }
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- { id: 4, class: gpr64 }
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- { id: 5, class: gpr32 }
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- { id: 6, class: xseqpairsclass }
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- { id: 7, class: gpr64 }
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# CHECK-LABEL: name: func0
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name: func0
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body: |
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bb.0:
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; We usually should not coalesce copies from allocatable physregs.
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; CHECK: %0 = COPY %w7
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; CHECK: STRWui %0, %x1, 0
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%0 = COPY %w7
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%0 : gpr32 = COPY %w7
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STRWui %0, %x1, 0
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; It is fine to coalesce copies from reserved physregs
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; CHECK-NOT: COPY
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; CHECK: STRXui %fp, %x1, 0
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%1 = COPY %fp
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%1 : gpr64 = COPY %fp
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STRXui %1, %x1, 0
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; It is not fine to coalesce copies from reserved physregs when they are
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; clobbered.
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; CHECK: %2 = COPY %fp
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; CHECK: STRXui %2, %x1, 0
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%2 = COPY %fp
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%2 : gpr64 = COPY %fp
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%fp = SUBXri %fp, 4, 0
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STRXui %2, %x1, 0
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@ -43,7 +36,7 @@ body: |
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; clobbered.
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; CHECK-NOT: COPY
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; CHECK: STRWui %wzr, %x1
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%3 = COPY %wzr
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%3 : gpr32 = COPY %wzr
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dead %wzr = SUBSWri %w1, 0, 0, implicit-def %nzcv
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STRWui %3, %x1, 0
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@ -51,13 +44,13 @@ body: |
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; clobbered.
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; CHECK-NOT: COPY
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; CHECK: STRXui %xzr, %x1
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%4 = COPY %xzr
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%4 : gpr64 = COPY %xzr
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dead %wzr = SUBSWri %w1, 0, 0, implicit-def %nzcv
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STRXui %4, %x1, 0
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; Coalescing COPYs into constant physregs.
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; CHECK: %wzr = SUBSWri %w1, 0, 0
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%5 = SUBSWri %w1, 0, 0, implicit-def %nzcv
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%5 : gpr32 = SUBSWri %w1, 0, 0, implicit-def %nzcv
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%wzr = COPY %5
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; Only coalesce when the source register is reserved as a whole (this is
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@ -65,7 +58,7 @@ body: |
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; of the non-reserved part).
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; CHECK: %6 = COPY %x28_fp
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; CHECK: HINT 0, implicit %6
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%6 = COPY %x28_fp
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%6 : xseqpairsclass = COPY %x28_fp
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HINT 0, implicit %6
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; It is not fine to coalesce copies from reserved physregs when they are
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@ -76,7 +69,69 @@ body: |
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; Need a def of x18 so that it's not deduced as "constant".
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%x18 = COPY %xzr
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%7 = COPY %x18
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%7 : gpr64 = COPY %x18
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BL @f2, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp
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STRXui %7, %x1, 0
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; This can be coalesced.
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; CHECK: %fp = SUBXri %fp, 4, 0
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%8 : gpr64sp = SUBXri %fp, 4, 0
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%fp = COPY %8
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; Cannot coalesce when there are reads of the physreg.
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; CHECK-NOT: %fp = SUBXri %fp, 8, 0
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; CHECK: %9 = SUBXri %fp, 8, 0
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; CHECK: STRXui %fp, %fp, 0
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; CHECK: %fp = COPY %9
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%9 : gpr64sp = SUBXri %fp, 8, 0
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STRXui %fp, %fp, 0
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%fp = COPY %9
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...
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---
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# Check coalescing of COPYs from reserved physregs.
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# CHECK-LABEL: name: func1
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name: func1
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body: |
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bb.0:
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successors: %bb.1, %bb.2
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; Cannot coalesce physreg because we have reads on other CFG paths (we
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; currently abort for any control flow)
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; CHECK-NOT: %fp = SUBXri
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; CHECK: %0 = SUBXri %fp, 12, 0
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; CHECK: CBZX undef %x0, %bb.1
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; CHECK: B %bb.2
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%0 : gpr64sp = SUBXri %fp, 12, 0
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CBZX undef %x0, %bb.1
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B %bb.2
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bb.1:
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%fp = COPY %0
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RET_ReallyLR
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bb.2:
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STRXui %fp, %fp, 0
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RET_ReallyLR
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...
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---
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# CHECK-LABEL: name: func2
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name: func2
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body: |
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bb.0:
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successors: %bb.1, %bb.2
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; We can coalesce copies from physreg to vreg across multiple blocks.
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; CHECK-NOT: COPY
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; CHECK: CBZX undef %x0, %bb.1
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; CHECK-NEXT: B %bb.2
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%0 : gpr64sp = COPY %fp
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CBZX undef %x0, %bb.1
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B %bb.2
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bb.1:
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; CHECK: STRXui undef %x0, %fp, 0
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; CHECK-NEXT: RET_ReallyLR
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STRXui undef %x0, %0, 0
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RET_ReallyLR
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bb.2:
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RET_ReallyLR
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...
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