diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 52e6a703fbce..ade5e7b26a95 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -1737,9 +1737,8 @@ MipsAsmParser::expandLoadAddressSym(MCInst &Inst, SMLoc IDLoc,
 bool MipsAsmParser::
 expandUncondBranchMMPseudo(MCInst &Inst, SMLoc IDLoc,
                            SmallVectorImpl<MCInst> &Instructions) {
-  const MCInstrDesc &MCID = getInstDesc(Inst.getOpcode());
-
-  assert(MCID.getNumOperands() == 1 && "unexpected number of operands");
+  assert(getInstDesc(Inst.getOpcode()).getNumOperands() == 1 &&
+         "unexpected number of operands");
 
   MCOperand Offset = Inst.getOperand(0);
   if (Offset.isExpr()) {