parent
fb3043d627
commit
f69d13b60a
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@ -183,9 +183,12 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
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setOperationAction(ISD::ConstantPool, MVT::i64, Custom);
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setOperationAction(ISD::JumpTable, MVT::i64, Custom);
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// RET must be custom lowered, to meet ABI requirements
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// RET must be custom lowered, to meet ABI requirements.
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setOperationAction(ISD::RET , MVT::Other, Custom);
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// TRAP is legal.
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setOperationAction(ISD::TRAP, MVT::Other, Legal);
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// VASTART needs to be custom lowered to use the VarArgsFrameIndex
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setOperationAction(ISD::VASTART , MVT::Other, Custom);
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@ -298,6 +298,17 @@ class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
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let Inst{31} = 0;
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}
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class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
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InstrItinClass itin, list<dag> pattern>
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: I<opcode, OOL, IOL, asmstr, itin> {
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let Pattern = pattern;
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let Inst{6-10} = 31;
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let Inst{11-15} = 0;
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let Inst{16-20} = 0;
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let Inst{21-30} = xo;
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let Inst{31} = 0;
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}
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class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
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InstrItinClass itin, list<dag> pattern>
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: XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
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@ -575,6 +575,9 @@ def STWCX : XForm_1<31, 150, (outs), (ins GPRC:$rS, memrr:$dst),
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[(PPCstcx GPRC:$rS, xoaddr:$dst)]>,
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isDOT;
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let isBarrier = 1, hasCtrlDep = 1 in
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def TRAP : XForm_24<31, 4, (outs), (ins), "trap", LdStGeneral, [(trap)]>;
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//===----------------------------------------------------------------------===//
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// PPC32 Load Instructions.
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//
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@ -3,7 +3,6 @@
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TODO:
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* gpr0 allocation
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* implement do-loop -> bdnz transform
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* Implement __builtin_trap (ISD::TRAP) as 'tw 31, 0, 0' aka 'trap'.
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* lmw/stmw pass a la arm load store optimizer for prolog/epilog
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===-------------------------------------------------------------------------===
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