Refactor the disabling of Thumb-1 LDM/STM generation

Originally I switched the LD/ST optimizer off in TargetMachine as it was previously, but Eric has suggested he'd prefer that it be short-circuited in the pass itself.

No functionality change.

llvm-svn: 211037
This commit is contained in:
James Molloy 2014-06-16 16:42:53 +00:00
parent 95cf2f25fe
commit f6419cfb14
2 changed files with 7 additions and 7 deletions

View File

@ -1734,6 +1734,10 @@ bool ARMLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
isThumb2 = AFI->isThumb2Function();
isThumb1 = AFI->isThumbFunction() && !isThumb2;
// FIXME: Temporarily disabling for Thumb-1 due to miscompiles
if (isThumb1)
return false;
bool Modified = false;
for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
++MFI) {

View File

@ -203,8 +203,7 @@ bool ARMPassConfig::addInstSelector() {
}
bool ARMPassConfig::addPreRegAlloc() {
// FIXME: Temporarily disabling Thumb-1 pre-RA Load/Store optimization pass
if (getOptLevel() != CodeGenOpt::None && !getARMSubtarget().isThumb1Only())
if (getOptLevel() != CodeGenOpt::None)
addPass(createARMLoadStoreOptimizationPass(true));
if (getOptLevel() != CodeGenOpt::None && getARMSubtarget().isCortexA9())
addPass(createMLxExpansionPass());
@ -219,11 +218,8 @@ bool ARMPassConfig::addPreRegAlloc() {
bool ARMPassConfig::addPreSched2() {
if (getOptLevel() != CodeGenOpt::None) {
// FIXME: Temporarily disabling Thumb-1 post-RA Load/Store optimization pass
if (!getARMSubtarget().isThumb1Only()) {
addPass(createARMLoadStoreOptimizationPass());
printAndVerify("After ARM load / store optimizer");
}
addPass(createARMLoadStoreOptimizationPass());
printAndVerify("After ARM load / store optimizer");
if (getARMSubtarget().hasNEON())
addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));