From f55a785e56e12ea6d439061227fb3951a73285e8 Mon Sep 17 00:00:00 2001 From: Bruno Cardoso Lopes Date: Tue, 28 Aug 2007 05:04:41 +0000 Subject: [PATCH] Added methods to record SPOffsets from LowerFORMAL_ARGUMENTS llvm-svn: 41525 --- llvm/lib/Target/Mips/MipsMachineFunction.h | 56 ++++++++++++++++++++-- 1 file changed, 53 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/Mips/MipsMachineFunction.h b/llvm/lib/Target/Mips/MipsMachineFunction.h index b362dc353833..0f9a1e0e6a31 100644 --- a/llvm/lib/Target/Mips/MipsMachineFunction.h +++ b/llvm/lib/Target/Mips/MipsMachineFunction.h @@ -14,7 +14,9 @@ #ifndef MIPS_MACHINE_FUNCTION_INFO_H #define MIPS_MACHINE_FUNCTION_INFO_H +#include "llvm/ADT/VectorExtras.h" #include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineFrameInfo.h" namespace llvm { @@ -31,9 +33,34 @@ private: /// the Return Address must be saved int RAStackOffset; + /// MipsFIHolder - Holds a FrameIndex and it's Stack Pointer Offset + struct MipsFIHolder { + + int FI; + int SPOffset; + + MipsFIHolder(int FrameIndex, int StackPointerOffset) + : FI(FrameIndex), SPOffset(StackPointerOffset) {} + }; + + // On LowerFORMAL_ARGUMENTS the stack size is unknown, + // so the Stack Pointer Offset calculation of "not in + // register arguments" must be postponed to emitPrologue. + SmallVector FnLoadArgs; + bool HasLoadArgs; + + // When VarArgs, we must write registers back to caller + // stack, preserving on register arguments. Since the + // stack size is unknown on LowerFORMAL_ARGUMENTS, + // the Stack Pointer Offset calculation must be + // postponed to emitPrologue. + SmallVector FnStoreVarArgs; + bool HasStoreVarArgs; + public: MipsFunctionInfo(MachineFunction& MF) - : FPStackOffset(0), RAStackOffset(0) + : FPStackOffset(0), RAStackOffset(0), + HasLoadArgs(false), HasStoreVarArgs(false) {} int getFPStackOffset() const { return FPStackOffset; } @@ -46,9 +73,32 @@ public: return (RAStackOffset > FPStackOffset) ? (RAStackOffset) : (FPStackOffset); } + + bool hasLoadArgs() const { return HasLoadArgs; } + bool hasStoreVarArgs() const { return HasStoreVarArgs; } + + void recordLoadArgsFI(int FI, int SPOffset) { + if (!HasLoadArgs) HasLoadArgs=true; + FnLoadArgs.push_back(MipsFIHolder(FI, SPOffset)); + } + void recordStoreVarArgsFI(int FI, int SPOffset) { + if (!HasStoreVarArgs) HasStoreVarArgs=true; + FnStoreVarArgs.push_back(MipsFIHolder(FI, SPOffset)); + } + + void adjustLoadArgsFI(MachineFrameInfo *MFI) const { + if (!hasLoadArgs()) return; + for (unsigned i = 0, e = FnLoadArgs.size(); i != e; ++i) + MFI->setObjectOffset( FnLoadArgs[i].FI, FnLoadArgs[i].SPOffset ); + } + void adjustStoreVarArgsFI(MachineFrameInfo *MFI) const { + if (!hasStoreVarArgs()) return; + for (unsigned i = 0, e = FnStoreVarArgs.size(); i != e; ++i) + MFI->setObjectOffset( FnStoreVarArgs[i].FI, FnStoreVarArgs[i].SPOffset ); + } + }; } // end of namespace llvm - -#endif +#endif // MIPS_MACHINE_FUNCTION_INFO_H