[AArch64] Add a test case for the propagation of register banks through
phis. llvm-svn: 266028
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@ -25,6 +25,18 @@
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entry:
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ret void
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}
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define void @phiPropagation(i32* %src, i32* %dst, i1 %cond) {
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entry:
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%srcVal = load i32, i32* %src
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br i1 %cond, label %end, label %then
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then:
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%res = add i32 %srcVal, 36
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br label %end
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end:
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%toStore = phi i32 [ %srcVal, %entry ], [ %res, %then ]
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store i32 %toStore, i32* %dst
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ret void
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}
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...
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---
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@ -128,3 +140,40 @@ body: |
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%0(32) = COPY %w0
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%1(32) = G_ADD i32 %0, %w0
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...
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---
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# Check that we are able to propagate register banks from phis.
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name: phiPropagation
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isSSA: true
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tracksRegLiveness: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr32 }
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# CHECK-NEXT: - { id: 1, class: gpr64sp }
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# CHECK-NEXT: - { id: 2, class: gpr32 }
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# CHECK-NEXT: - { id: 3, class: gpr }
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# CHECK-NEXT: - { id: 4, class: gpr }
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registers:
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- { id: 0, class: gpr32 }
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- { id: 1, class: gpr64sp }
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- { id: 2, class: gpr32 }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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body: |
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bb.0.entry:
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successors: %bb.2.end, %bb.1.then
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liveins: %x0, %x1, %w2
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%0 = LDRWui killed %x0, 0 :: (load 4 from %ir.src)
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%1 = COPY %x1
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%2 = COPY %w2
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TBNZW killed %2, 0, %bb.2.end
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bb.1.then:
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successors: %bb.2.end
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%3(32) = G_ADD i32 %0, %0
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bb.2.end:
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%4(32) = PHI %0, %bb.0.entry, %3, %bb.1.then
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STRWui killed %4, killed %1, 0 :: (store 4 into %ir.dst)
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RET_ReallyLR
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...
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