R600/SI: Fix size of VReg_1
This is really a 32-bit register, if we try to check the size of it, we want 32-bits. llvm-svn: 229223
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@ -209,7 +209,7 @@ def VReg_256 : RegisterClass<"AMDGPU", [v32i8, v8i32, v8f32], 256, (add VGPR_256
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def VReg_512 : RegisterClass<"AMDGPU", [v16i32, v16f32], 512, (add VGPR_512)>;
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def VReg_1 : RegisterClass<"AMDGPU", [i1], 32, (add VGPR_32)>;
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def VReg_1 : RegisterClass<"AMDGPU", [i1, i32], 32, (add VGPR_32)>;
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class RegImmOperand <RegisterClass rc> : RegisterOperand<rc> {
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let OperandNamespace = "AMDGPU";
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