diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
index 4fd28fc6d81e..d20910baed30 100644
--- a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
@@ -596,7 +596,7 @@ bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) {
             unsigned OpNo = UseMI->getOperandNo(&Use);
             const MCInstrDesc &Desc = TII->get(UseMI->getOpcode());
             if (!Desc.isPseudo() && Desc.OpInfo &&
-                OpNo <= Desc.getNumOperands() &&
+                OpNo < Desc.getNumOperands() &&
                 Desc.OpInfo[OpNo].RegClass != -1) {
               const TargetRegisterClass *OpRC =
                   TRI->getRegClass(Desc.OpInfo[OpNo].RegClass);