parent
ae4f266b2d
commit
f34d7ac9f1
|
@ -164,7 +164,7 @@ private:
|
||||||
|
|
||||||
/// Schedule - Schedule the DAG using list scheduling.
|
/// Schedule - Schedule the DAG using list scheduling.
|
||||||
void ScheduleDAGRRList::Schedule() {
|
void ScheduleDAGRRList::Schedule() {
|
||||||
DEBUG(errs() << "********** List Scheduling **********\n");
|
DEBUG(dbgs() << "********** List Scheduling **********\n");
|
||||||
|
|
||||||
NumLiveRegs = 0;
|
NumLiveRegs = 0;
|
||||||
LiveRegDefs.resize(TRI->getNumRegs(), NULL);
|
LiveRegDefs.resize(TRI->getNumRegs(), NULL);
|
||||||
|
@ -199,9 +199,9 @@ void ScheduleDAGRRList::ReleasePred(SUnit *SU, const SDep *PredEdge) {
|
||||||
|
|
||||||
#ifndef NDEBUG
|
#ifndef NDEBUG
|
||||||
if (PredSU->NumSuccsLeft == 0) {
|
if (PredSU->NumSuccsLeft == 0) {
|
||||||
errs() << "*** Scheduling failed! ***\n";
|
dbgs() << "*** Scheduling failed! ***\n";
|
||||||
PredSU->dump(this);
|
PredSU->dump(this);
|
||||||
errs() << " has been released too many times!\n";
|
dbgs() << " has been released too many times!\n";
|
||||||
llvm_unreachable(0);
|
llvm_unreachable(0);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@ -238,7 +238,7 @@ void ScheduleDAGRRList::ReleasePredecessors(SUnit *SU, unsigned CurCycle) {
|
||||||
/// count of its predecessors. If a predecessor pending count is zero, add it to
|
/// count of its predecessors. If a predecessor pending count is zero, add it to
|
||||||
/// the Available queue.
|
/// the Available queue.
|
||||||
void ScheduleDAGRRList::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) {
|
void ScheduleDAGRRList::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) {
|
||||||
DEBUG(errs() << "*** Scheduling [" << CurCycle << "]: ");
|
DEBUG(dbgs() << "*** Scheduling [" << CurCycle << "]: ");
|
||||||
DEBUG(SU->dump(this));
|
DEBUG(SU->dump(this));
|
||||||
|
|
||||||
assert(CurCycle >= SU->getHeight() && "Node scheduled below its height!");
|
assert(CurCycle >= SU->getHeight() && "Node scheduled below its height!");
|
||||||
|
@ -284,7 +284,7 @@ void ScheduleDAGRRList::CapturePred(SDep *PredEdge) {
|
||||||
/// UnscheduleNodeBottomUp - Remove the node from the schedule, update its and
|
/// UnscheduleNodeBottomUp - Remove the node from the schedule, update its and
|
||||||
/// its predecessor states to reflect the change.
|
/// its predecessor states to reflect the change.
|
||||||
void ScheduleDAGRRList::UnscheduleNodeBottomUp(SUnit *SU) {
|
void ScheduleDAGRRList::UnscheduleNodeBottomUp(SUnit *SU) {
|
||||||
DEBUG(errs() << "*** Unscheduling [" << SU->getHeight() << "]: ");
|
DEBUG(dbgs() << "*** Unscheduling [" << SU->getHeight() << "]: ");
|
||||||
DEBUG(SU->dump(this));
|
DEBUG(SU->dump(this));
|
||||||
|
|
||||||
AvailableQueue->UnscheduledNode(SU);
|
AvailableQueue->UnscheduledNode(SU);
|
||||||
|
@ -371,7 +371,7 @@ SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) {
|
||||||
if (!TII->unfoldMemoryOperand(*DAG, N, NewNodes))
|
if (!TII->unfoldMemoryOperand(*DAG, N, NewNodes))
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
DEBUG(errs() << "Unfolding SU # " << SU->NodeNum << "\n");
|
DEBUG(dbgs() << "Unfolding SU # " << SU->NodeNum << "\n");
|
||||||
assert(NewNodes.size() == 2 && "Expected a load folding node!");
|
assert(NewNodes.size() == 2 && "Expected a load folding node!");
|
||||||
|
|
||||||
N = NewNodes[1];
|
N = NewNodes[1];
|
||||||
|
@ -490,7 +490,7 @@ SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) {
|
||||||
SU = NewSU;
|
SU = NewSU;
|
||||||
}
|
}
|
||||||
|
|
||||||
DEBUG(errs() << "Duplicating SU # " << SU->NodeNum << "\n");
|
DEBUG(dbgs() << "Duplicating SU # " << SU->NodeNum << "\n");
|
||||||
NewSU = CreateClone(SU);
|
NewSU = CreateClone(SU);
|
||||||
|
|
||||||
// New SUnit has the exact same predecessors.
|
// New SUnit has the exact same predecessors.
|
||||||
|
@ -771,7 +771,7 @@ void ScheduleDAGRRList::ListScheduleBottomUp() {
|
||||||
// Issue copies, these can be expensive cross register class copies.
|
// Issue copies, these can be expensive cross register class copies.
|
||||||
SmallVector<SUnit*, 2> Copies;
|
SmallVector<SUnit*, 2> Copies;
|
||||||
InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies);
|
InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies);
|
||||||
DEBUG(errs() << "Adding an edge from SU #" << TrySU->NodeNum
|
DEBUG(dbgs() << "Adding an edge from SU #" << TrySU->NodeNum
|
||||||
<< " to SU #" << Copies.front()->NodeNum << "\n");
|
<< " to SU #" << Copies.front()->NodeNum << "\n");
|
||||||
AddPred(TrySU, SDep(Copies.front(), SDep::Order, /*Latency=*/1,
|
AddPred(TrySU, SDep(Copies.front(), SDep::Order, /*Latency=*/1,
|
||||||
/*Reg=*/0, /*isNormalMemory=*/false,
|
/*Reg=*/0, /*isNormalMemory=*/false,
|
||||||
|
@ -780,7 +780,7 @@ void ScheduleDAGRRList::ListScheduleBottomUp() {
|
||||||
NewDef = Copies.back();
|
NewDef = Copies.back();
|
||||||
}
|
}
|
||||||
|
|
||||||
DEBUG(errs() << "Adding an edge from SU #" << NewDef->NodeNum
|
DEBUG(dbgs() << "Adding an edge from SU #" << NewDef->NodeNum
|
||||||
<< " to SU #" << TrySU->NodeNum << "\n");
|
<< " to SU #" << TrySU->NodeNum << "\n");
|
||||||
LiveRegDefs[Reg] = NewDef;
|
LiveRegDefs[Reg] = NewDef;
|
||||||
AddPred(NewDef, SDep(TrySU, SDep::Order, /*Latency=*/1,
|
AddPred(NewDef, SDep(TrySU, SDep::Order, /*Latency=*/1,
|
||||||
|
@ -827,9 +827,9 @@ void ScheduleDAGRRList::ReleaseSucc(SUnit *SU, const SDep *SuccEdge) {
|
||||||
|
|
||||||
#ifndef NDEBUG
|
#ifndef NDEBUG
|
||||||
if (SuccSU->NumPredsLeft == 0) {
|
if (SuccSU->NumPredsLeft == 0) {
|
||||||
errs() << "*** Scheduling failed! ***\n";
|
dbgs() << "*** Scheduling failed! ***\n";
|
||||||
SuccSU->dump(this);
|
SuccSU->dump(this);
|
||||||
errs() << " has been released too many times!\n";
|
dbgs() << " has been released too many times!\n";
|
||||||
llvm_unreachable(0);
|
llvm_unreachable(0);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@ -858,7 +858,7 @@ void ScheduleDAGRRList::ReleaseSuccessors(SUnit *SU) {
|
||||||
/// count of its successors. If a successor pending count is zero, add it to
|
/// count of its successors. If a successor pending count is zero, add it to
|
||||||
/// the Available queue.
|
/// the Available queue.
|
||||||
void ScheduleDAGRRList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) {
|
void ScheduleDAGRRList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) {
|
||||||
DEBUG(errs() << "*** Scheduling [" << CurCycle << "]: ");
|
DEBUG(dbgs() << "*** Scheduling [" << CurCycle << "]: ");
|
||||||
DEBUG(SU->dump(this));
|
DEBUG(SU->dump(this));
|
||||||
|
|
||||||
assert(CurCycle >= SU->getDepth() && "Node scheduled above its depth!");
|
assert(CurCycle >= SU->getDepth() && "Node scheduled above its depth!");
|
||||||
|
@ -1329,7 +1329,7 @@ void RegReductionPriorityQueue<SF>::PrescheduleNodesWithMultipleUses() {
|
||||||
|
|
||||||
// Ok, the transformation is safe and the heuristics suggest it is
|
// Ok, the transformation is safe and the heuristics suggest it is
|
||||||
// profitable. Update the graph.
|
// profitable. Update the graph.
|
||||||
DEBUG(errs() << "Prescheduling SU # " << SU->NodeNum
|
DEBUG(dbgs() << "Prescheduling SU # " << SU->NodeNum
|
||||||
<< " next to PredSU # " << PredSU->NodeNum
|
<< " next to PredSU # " << PredSU->NodeNum
|
||||||
<< " to guide scheduling in the presence of multiple uses\n");
|
<< " to guide scheduling in the presence of multiple uses\n");
|
||||||
for (unsigned i = 0; i != PredSU->Succs.size(); ++i) {
|
for (unsigned i = 0; i != PredSU->Succs.size(); ++i) {
|
||||||
|
@ -1419,7 +1419,7 @@ void RegReductionPriorityQueue<SF>::AddPseudoTwoAddrDeps() {
|
||||||
(hasCopyToRegUse(SU) && !hasCopyToRegUse(SuccSU)) ||
|
(hasCopyToRegUse(SU) && !hasCopyToRegUse(SuccSU)) ||
|
||||||
(!SU->isCommutable && SuccSU->isCommutable)) &&
|
(!SU->isCommutable && SuccSU->isCommutable)) &&
|
||||||
!scheduleDAG->IsReachable(SuccSU, SU)) {
|
!scheduleDAG->IsReachable(SuccSU, SU)) {
|
||||||
DEBUG(errs() << "Adding a pseudo-two-addr edge from SU # "
|
DEBUG(dbgs() << "Adding a pseudo-two-addr edge from SU # "
|
||||||
<< SU->NodeNum << " to SU #" << SuccSU->NodeNum << "\n");
|
<< SU->NodeNum << " to SU #" << SuccSU->NodeNum << "\n");
|
||||||
scheduleDAG->AddPred(SU, SDep(SuccSU, SDep::Order, /*Latency=*/0,
|
scheduleDAG->AddPred(SU, SDep(SuccSU, SDep::Order, /*Latency=*/0,
|
||||||
/*Reg=*/0, /*isNormalMemory=*/false,
|
/*Reg=*/0, /*isNormalMemory=*/false,
|
||||||
|
|
Loading…
Reference in New Issue