Bugfix: ScalarEvolution incorrectly assumes that the start of certain
add recurrences don't overflow. This change makes the optimization more restrictive. It still assumes that an overflowing `add nsw` is undefined behavior; and this change will need revisiting once we have a consistent semantics for poison values. Differential Revision: http://reviews.llvm.org/D7331 llvm-svn: 228552
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Sanjoy Das
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68ab0465a0
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f2e931cae9
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@ -1364,7 +1364,24 @@ static const SCEV *getPreStartForSignExtend(const SCEVAddRecExpr *AR,
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const SCEVAddRecExpr *PreAR = dyn_cast<SCEVAddRecExpr>(
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SE->getAddRecExpr(PreStart, Step, L, SCEV::FlagAnyWrap));
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if (PreAR && PreAR->getNoWrapFlags(SCEV::FlagNSW))
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// WARNING: FIXME: the optimization below assumes that a sign-overflowing nsw
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// operation is undefined behavior. This is strictly more aggressive than the
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// interpretation of nsw in other parts of LLVM (for instance, they may
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// unconditionally hoist nsw arithmetic through control flow). This logic
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// needs to be revisited once we have a consistent semantics for poison
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// values.
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//
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// "{S,+,X} is <nsw>" and "{S,+,X} is evaluated at least once" implies "S+X
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// does not sign-overflow" (we'd have undefined behavior if it did). If
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// `L->getExitingBlock() == L->getLoopLatch()` then `PreAR` (= {S,+,X}<nsw>)
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// is evaluated every-time `AR` (= {S+X,+,X}) is evaluated, and hence within
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// `AR` we are safe to assume that "S+X" will not sign-overflow.
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//
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BasicBlock *ExitingBlock = L->getExitingBlock();
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BasicBlock *LatchBlock = L->getLoopLatch();
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if (PreAR && PreAR->getNoWrapFlags(SCEV::FlagNSW) &&
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ExitingBlock != nullptr && ExitingBlock == LatchBlock)
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return PreStart;
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// 2. Direct overflow check on the step operation's expression.
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@ -0,0 +1,116 @@
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; RUN: opt -analyze -scalar-evolution < %s | FileCheck %s
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; An example run where SCEV(%postinc)->getStart() may overflow:
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;
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; %start = INT_SMAX
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; %low.limit = INT_SMIN
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; %high.limit = < not used >
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;
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; >> entry:
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; %postinc.start = INT_SMIN
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;
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; >> loop:
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; %idx = %start
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; %postinc = INT_SMIN
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; %postinc.inc = INT_SMIN + 1
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; %postinc.sext = sext(INT_SMIN) = i64 INT32_SMIN
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; %break.early = INT_SMIN `slt` INT_SMIN = false
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; br i1 false, ___, %early.exit
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;
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; >> early.exit:
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; ret i64 INT32_SMIN
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define i64 @bad.0(i32 %start, i32 %low.limit, i32 %high.limit) {
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; CHECK-LABEL: Classifying expressions for: @bad.0
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entry:
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%postinc.start = add i32 %start, 1
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br label %loop
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loop:
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%idx = phi i32 [ %start, %entry ], [ %idx.inc, %continue ]
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%postinc = phi i32 [ %postinc.start, %entry ], [ %postinc.inc, %continue ]
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%postinc.inc = add nsw i32 %postinc, 1
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%postinc.sext = sext i32 %postinc to i64
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; CHECK: %postinc.sext = sext i32 %postinc to i64
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; CHECK-NEXT: --> {(sext i32 (1 + %start) to i64),+,1}<nsw><%loop>
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%break.early = icmp slt i32 %postinc, %low.limit
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br i1 %break.early, label %continue, label %early.exit
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continue:
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%idx.inc = add nsw i32 %idx, 1
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%cmp = icmp slt i32 %idx.inc, %high.limit
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br i1 %cmp, label %loop, label %exit
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exit:
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ret i64 0
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early.exit:
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ret i64 %postinc.sext
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}
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define i64 @bad.1(i32 %start, i32 %low.limit, i32 %high.limit, i1* %unknown) {
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; CHECK-LABEL: Classifying expressions for: @bad.1
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entry:
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%postinc.start = add i32 %start, 1
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br label %loop
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loop:
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%idx = phi i32 [ %start, %entry ], [ %idx.inc, %continue ], [ %idx.inc, %continue.1 ]
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%postinc = phi i32 [ %postinc.start, %entry ], [ %postinc.inc, %continue ], [ %postinc.inc, %continue.1 ]
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%postinc.inc = add nsw i32 %postinc, 1
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%postinc.sext = sext i32 %postinc to i64
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; CHECK: %postinc.sext = sext i32 %postinc to i64
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; CHECK-NEXT: --> {(sext i32 (1 + %start) to i64),+,1}<nsw><%loop>
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%break.early = icmp slt i32 %postinc, %low.limit
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br i1 %break.early, label %continue.1, label %early.exit
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continue.1:
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%cond = load volatile i1* %unknown
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%idx.inc = add nsw i32 %idx, 1
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br i1 %cond, label %loop, label %continue
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continue:
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%cmp = icmp slt i32 %idx.inc, %high.limit
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br i1 %cmp, label %loop, label %exit
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exit:
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ret i64 0
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early.exit:
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ret i64 %postinc.sext
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}
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; WARNING: FIXME: it is safe to make the inference demonstrated here
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; only if we assume `add nsw` has undefined behavior if the result
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; sign-overflows; and this interpretation is stronger than what most
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; of LLVM assumes. This test here only serves as a documentation of
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; current behavior and will need to be revisited once we've decided
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; upon a consistent semantics for nsw (and nuw) arithetic operations.
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;
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define i64 @good(i32 %start, i32 %low.limit, i32 %high.limit) {
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; CHECK-LABEL: Classifying expressions for: @good
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entry:
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%postinc.start = add i32 %start, 1
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br label %loop
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loop:
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%idx = phi i32 [ %start, %entry ], [ %idx.inc, %loop ]
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%postinc = phi i32 [ %postinc.start, %entry ], [ %postinc.inc, %loop ]
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%postinc.inc = add nsw i32 %postinc, 1
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%postinc.sext = sext i32 %postinc to i64
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; CHECK: %postinc.sext = sext i32 %postinc to i64
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; CHECK-NEXT: --> {(1 + (sext i32 %start to i64)),+,1}<nsw><%loop>
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%break.early = icmp slt i32 %postinc, %low.limit
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%idx.inc = add nsw i32 %idx, 1
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%cmp = icmp slt i32 %idx.inc, %high.limit
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br i1 %cmp, label %loop, label %exit
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exit:
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ret i64 0
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early.exit:
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ret i64 %postinc.sext
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}
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