Use simple RegState::Define flag instead of getDefRegState(true).
llvm-svn: 116601
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84378f0f53
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@ -586,7 +586,7 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {
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.addReg(0)
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.addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? ARM_AM::lsr
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: ARM_AM::asr), 1)))
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.addReg(ARM::CPSR, getDefRegState(true));
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.addReg(ARM::CPSR, RegState::Define);
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MI.eraseFromParent();
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break;
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}
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@ -616,7 +616,7 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {
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(*MIB1).setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
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MachineInstrBuilder MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
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TII->get(ARM::tPICADD))
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.addReg(DstReg, getDefRegState(true) | getDeadRegState(DstIsDead))
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.addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
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.addReg(DstReg)
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.addOperand(MI.getOperand(2));
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TransferImpOps(MI, MIB1, MIB2);
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@ -640,7 +640,7 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {
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HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
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TII->get(Opcode == ARM::MOVi32imm ?
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ARM::MOVTi16 : ARM::t2MOVTi16))
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.addReg(DstReg, getDefRegState(true) | getDeadRegState(DstIsDead))
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.addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
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.addReg(DstReg);
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if (MO.isImm()) {
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@ -677,13 +677,13 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {
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AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(),
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TII->get(ARM::VMOVQ))
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.addReg(EvenDst,
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getDefRegState(true) | getDeadRegState(DstIsDead))
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RegState::Define | getDeadRegState(DstIsDead))
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.addReg(EvenSrc, getKillRegState(SrcIsKill)));
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MachineInstrBuilder Odd =
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AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(),
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TII->get(ARM::VMOVQ))
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.addReg(OddDst,
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getDefRegState(true) | getDeadRegState(DstIsDead))
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RegState::Define | getDeadRegState(DstIsDead))
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.addReg(OddSrc, getKillRegState(SrcIsKill)));
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TransferImpOps(MI, Even, Odd);
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MI.eraseFromParent();
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