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AMDGPU: Remove last AMDIL intrinsics 

llvm-svn: 275309
This commit is contained in:
Matt Arsenault 2016-07-13 19:42:06 +00:00
parent 390b7ea533
commit f071102647
3 changed files with 2 additions and 23 deletions
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6
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
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@ -931,8 +931,7 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
switch (IntrinsicID) { switch (IntrinsicID) {
default: return Op; default: return Op;
case AMDGPUIntrinsic::AMDGPU_clamp: case AMDGPUIntrinsic::AMDGPU_clamp: // Legacy name.
case AMDGPUIntrinsic::AMDIL_clamp: // Legacy name.
return DAG.getNode(AMDGPUISD::CLAMP, DL, VT, return DAG.getNode(AMDGPUISD::CLAMP, DL, VT,
Op.getOperand(1), Op.getOperand(2), Op.getOperand(3)); Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
@ -952,9 +951,6 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
Op.getOperand(2), Op.getOperand(2),
Op.getOperand(3)); Op.getOperand(3));
case AMDGPUIntrinsic::AMDIL_exp: // Legacy name.
return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1));
case AMDGPUIntrinsic::AMDGPU_brev: // Legacy name case AMDGPUIntrinsic::AMDGPU_brev: // Legacy name
return DAG.getNode(ISD::BITREVERSE, DL, VT, Op.getOperand(1)); return DAG.getNode(ISD::BITREVERSE, DL, VT, Op.getOperand(1));
} }

6
llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td
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@ -49,10 +49,4 @@ let TargetPrefix = "AMDGPU", isTarget = 1 in {
def int_AMDGPU_read_workdim : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>; def int_AMDGPU_read_workdim : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
} }
// Legacy names for compatibility.
let TargetPrefix = "AMDIL", isTarget = 1 in {
def int_AMDIL_clamp : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
def int_AMDIL_exp : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
}
include "SIIntrinsics.td" include "SIIntrinsics.td"

13
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.clamp.ll
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@ -1,10 +1,9 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
declare float @llvm.fabs.f32(float) nounwind readnone declare float @llvm.fabs.f32(float) nounwind readnone
declare float @llvm.AMDGPU.clamp.f32(float, float, float) nounwind readnone declare float @llvm.AMDGPU.clamp.f32(float, float, float) nounwind readnone
declare float @llvm.AMDIL.clamp.f32(float, float, float) nounwind readnone
; FUNC-LABEL: {{^}}clamp_0_1_f32: ; FUNC-LABEL: {{^}}clamp_0_1_f32:
; SI: s_load_dword [[ARG:s[0-9]+]], ; SI: s_load_dword [[ARG:s[0-9]+]],
@ -55,13 +54,3 @@ define void @clamp_fneg_fabs_0_1_f32(float addrspace(1)* %out, float %src) nounw
store float %clamp, float addrspace(1)* %out, align 4 store float %clamp, float addrspace(1)* %out, align 4
ret void ret void
} }
; FUNC-LABEL: {{^}}clamp_0_1_amdil_legacy_f32:
; SI: s_load_dword [[ARG:s[0-9]+]],
; SI: v_add_f32_e64 [[RESULT:v[0-9]+]], 0, [[ARG]] clamp{{$}}
; SI: buffer_store_dword [[RESULT]]
define void @clamp_0_1_amdil_legacy_f32(float addrspace(1)* %out, float %src) nounwind {
%clamp = call float @llvm.AMDIL.clamp.f32(float %src, float 0.0, float 1.0) nounwind readnone
store float %clamp, float addrspace(1)* %out, align 4
ret void
}