From f070544f8e2269eb94610d13484f471b3b4fe19d Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek <kparzysz@codeaurora.org>
Date: Fri, 2 Nov 2018 14:17:47 +0000
Subject: [PATCH] [Hexagon] Do not reduce load size for globals in small-data

Small-data (i.e. GP-relative) loads and stores allow 16-bit scaled
offset. For a load of a value of type T, the small-data area is
equivalent to an array "T sdata[65536]". This implies that objects
of smaller sizes need to be closer to the beginning of sdata,
while larger objects may be farther away, or otherwise the offset
may be insufficient to reach it. Similarly, an object of a larger
size should not be accessed via a load of a smaller size.

llvm-svn: 345975
---
 .../Target/Hexagon/HexagonISelLowering.cpp    | 15 +++++++++++++++
 llvm/lib/Target/Hexagon/HexagonISelLowering.h |  3 +++
 llvm/test/CodeGen/Hexagon/sdata-load-size.ll  | 19 +++++++++++++++++++
 3 files changed, 37 insertions(+)
 create mode 100644 llvm/test/CodeGen/Hexagon/sdata-load-size.ll

diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
index f2c27e5e39be..7a708a8ac24c 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -3080,6 +3080,21 @@ HexagonTargetLowering::findRepresentativeClass(const TargetRegisterInfo *TRI,
   return TargetLowering::findRepresentativeClass(TRI, VT);
 }
 
+bool HexagonTargetLowering::shouldReduceLoadWidth(SDNode *Load,
+      ISD::LoadExtType ExtTy, EVT NewVT) const {
+  auto *L = cast<LoadSDNode>(Load);
+  std::pair<SDValue,int> BO = getBaseAndOffset(L->getBasePtr());
+  // Small-data object, do not shrink.
+  if (BO.first.getOpcode() == HexagonISD::CONST32_GP)
+    return false;
+  if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(BO.first)) {
+    auto &HTM = static_cast<const HexagonTargetMachine&>(getTargetMachine());
+    const auto *GO = dyn_cast_or_null<const GlobalObject>(GA->getGlobal());
+    return !GO || !HTM.getObjFileLowering()->isGlobalInSmallSection(GO, HTM);
+  }
+  return true;
+}
+
 Value *HexagonTargetLowering::emitLoadLinked(IRBuilder<> &Builder, Value *Addr,
       AtomicOrdering Ord) const {
   BasicBlock *BB = Builder.GetInsertBlock();
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.h b/llvm/lib/Target/Hexagon/HexagonISelLowering.h
index 8efb3c9cda50..39af19b9b078 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.h
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.h
@@ -304,6 +304,9 @@ namespace HexagonISD {
     SDValue getPICJumpTableRelocBase(SDValue Table, SelectionDAG &DAG)
                                      const override;
 
+    bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
+                               EVT NewVT) const override;
+
     // Handling of atomic RMW instructions.
     Value *emitLoadLinked(IRBuilder<> &Builder, Value *Addr,
         AtomicOrdering Ord) const override;
diff --git a/llvm/test/CodeGen/Hexagon/sdata-load-size.ll b/llvm/test/CodeGen/Hexagon/sdata-load-size.ll
new file mode 100644
index 000000000000..325713f7062a
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/sdata-load-size.ll
@@ -0,0 +1,19 @@
+; RUN: llc -march=hexagon -hexagon-small-data-threshold=8 < %s | FileCheck %s
+; CHECK: = memd(gp+#g0)
+; If an object will be placed in .sdata, do not shrink any references to it.
+; In this case, g0 must be loaded via memd.
+
+target triple = "hexagon"
+
+@g0 = common global i64 0, align 8
+
+define i32 @f0() #0 {
+entry:
+  %v0 = load i64, i64* @g0, align 8
+  %v1 = trunc i64 %v0 to i8
+  %v2 = zext i8 %v1 to i32
+  ret i32 %v2
+}
+
+attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+small-data" }
+