[RISCV] Implement MC layer support for the tail pseudoinstruction
Summary: This patch implements MC support for tail psuedo instruction. A follow-up patch implements the codegen support as well as handling of the indirect tail pseudo instruction. Reviewers: asb, apazos Reviewed By: asb Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, llvm-commits Differential Revision: https://reviews.llvm.org/D46221 llvm-svn: 332634
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@ -943,7 +943,8 @@ bool RISCVAsmParser::ParseInstruction(ParseInstructionInfo &Info,
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return false;
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return false;
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// Parse first operand
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// Parse first operand
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if (parseOperand(Operands, Name == "call"))
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bool ForceImmediate = (Name == "call" || Name == "tail");
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if (parseOperand(Operands, ForceImmediate))
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return true;
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return true;
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// Parse until end of statement, consuming commas between operands
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// Parse until end of statement, consuming commas between operands
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@ -97,7 +97,7 @@ void RISCVMCCodeEmitter::expandFunctionCall(const MCInst &MI, raw_ostream &OS,
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const MCSubtargetInfo &STI) const {
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const MCSubtargetInfo &STI) const {
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MCInst TmpInst;
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MCInst TmpInst;
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MCOperand Func = MI.getOperand(0);
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MCOperand Func = MI.getOperand(0);
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unsigned Ra = RISCV::X1;
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unsigned Ra = (MI.getOpcode() == RISCV::PseudoTAIL) ? RISCV::X6 : RISCV::X1;
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uint32_t Binary;
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uint32_t Binary;
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assert(Func.isExpr() && "Expected expression");
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assert(Func.isExpr() && "Expected expression");
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@ -128,7 +128,8 @@ void RISCVMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
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// Get byte count of instruction.
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// Get byte count of instruction.
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unsigned Size = Desc.getSize();
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unsigned Size = Desc.getSize();
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if (MI.getOpcode() == RISCV::PseudoCALL) {
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if (MI.getOpcode() == RISCV::PseudoCALL ||
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MI.getOpcode() == RISCV::PseudoTAIL) {
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expandFunctionCall(MI, OS, Fixups, STI);
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expandFunctionCall(MI, OS, Fixups, STI);
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MCNumEmitted += 2;
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MCNumEmitted += 2;
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return;
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return;
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@ -661,6 +661,15 @@ let isBarrier = 1, isReturn = 1, isTerminator = 1 in
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def PseudoRET : Pseudo<(outs), (ins), [(RetFlag)]>,
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def PseudoRET : Pseudo<(outs), (ins), [(RetFlag)]>,
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PseudoInstExpansion<(JALR X0, X1, 0)>;
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PseudoInstExpansion<(JALR X0, X1, 0)>;
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// PseudoTAIL is a pseudo instruction similar to PseudoCALL and will eventually
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// expand to auipc and jalr while encoding.
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// Define AsmString to print "tail" when compile with -S flag.
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let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [X2],
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hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 0 in
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def PseudoTAIL : Pseudo<(outs), (ins bare_symbol:$dst), []> {
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let AsmString = "tail\t$dst";
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}
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/// Loads
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/// Loads
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multiclass LdPat<PatFrag LoadOp, RVInst Inst> {
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multiclass LdPat<PatFrag LoadOp, RVInst Inst> {
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@ -0,0 +1,12 @@
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# RUN: not llvm-mc -triple riscv32 < %s 2>&1 | FileCheck %s
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# RUN: not llvm-mc -triple riscv64 < %s 2>&1 | FileCheck %s
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tail 1234 # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
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tail %pcrel_hi(1234) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
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tail %pcrel_lo(1234) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
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tail %pcrel_hi(foo) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
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tail %pcrel_lo(foo) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
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tail %hi(1234) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
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tail %lo(1234) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
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tail %hi(foo) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
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tail %lo(foo) # CHECK: :[[@LINE]]:6: error: operand must be a bare symbol name
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@ -0,0 +1,47 @@
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# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
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# RUN: | llvm-objdump -d - | FileCheck -check-prefix=INSTR %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
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# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELOC %s
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# RUN: llvm-mc -triple riscv32 < %s -show-encoding \
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# RUN: | FileCheck -check-prefix=FIXUP %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
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# RUN: | llvm-objdump -d - | FileCheck -check-prefix=INSTR %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
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# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELOC %s
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# RUN: llvm-mc -triple riscv64 < %s -show-encoding \
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# RUN: | FileCheck -check-prefix=FIXUP %s
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.long foo
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tail foo
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# RELOC: R_RISCV_CALL foo 0x0
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# INSTR: auipc t1, 0
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# INSTR: jalr t1
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# FIXUP: fixup A - offset: 0, value: foo, kind:
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tail bar
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# RELOC: R_RISCV_CALL bar 0x0
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# INSTR: auipc t1, 0
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# INSTR: jalr t1
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# FIXUP: fixup A - offset: 0, value: bar, kind:
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# Ensure that tail calls to functions whose names coincide with register names
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# work.
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tail zero
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# RELOC: R_RISCV_CALL zero 0x0
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# INSTR: auipc t1, 0
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# INSTR: jalr t1
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# FIXUP: fixup A - offset: 0, value: zero, kind:
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tail f1
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# RELOC: R_RISCV_CALL f1 0x0
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# INSTR: auipc t1, 0
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# INSTR: jalr t1
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# FIXUP: fixup A - offset: 0, value: f1, kind:
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tail ra
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# RELOC: R_RISCV_CALL ra 0x0
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# INSTR: auipc t1, 0
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# INSTR: jalr t1
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# FIXUP: fixup A - offset: 0, value: ra, kind:
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