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third time around: instead of disabling this completely, 

only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)

llvm-svn: 44658
This commit is contained in:
Chris Lattner 2007-12-06 07:47:55 +00:00
parent b5fdfb9612
commit eedaf92fcf
2 changed files with 13 additions and 7 deletions
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19
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -2134,12 +2134,6 @@ SDOperand DAGCombiner::visitXOR(SDNode *N) {
/// visitShiftByConstant - Handle transforms common to the three shifts, when
/// the shift amount is a constant.
SDOperand DAGCombiner::visitShiftByConstant(SDNode *N, unsigned Amt) {
// FIXME: disable this for now. This pessimizes some common cases like:
//
//void foo(int *X, int i) { X[i & 1235] = 1; }
//int bar(int *X, int i) { return X[i & 255]; }
return SDOperand();
SDNode *LHS = N->getOperand(0).Val;
if (!LHS->hasOneUse()) return SDOperand();
@ -2169,6 +2163,19 @@ SDOperand DAGCombiner::visitShiftByConstant(SDNode *N, unsigned Amt) {
ConstantSDNode *BinOpCst = dyn_cast<ConstantSDNode>(LHS->getOperand(1));
if (!BinOpCst) return SDOperand();
// FIXME: disable this for unless the input to the binop is a shift by a
// constant. If it is not a shift, it pessimizes some common cases like:
//
//void foo(int *X, int i) { X[i & 1235] = 1; }
//int bar(int *X, int i) { return X[i & 255]; }
SDNode *BinOpLHSVal = LHS->getOperand(0).Val;
if ((BinOpLHSVal->getOpcode() != ISD::SHL &&
BinOpLHSVal->getOpcode() != ISD::SRA &&
BinOpLHSVal->getOpcode() != ISD::SRL) ||
!isa<ConstantSDNode>(BinOpLHSVal->getOperand(1)))
return SDOperand();
MVT::ValueType VT = N->getValueType(0);
// If this is a signed shift right, and the high bit is modified

1
llvm/test/CodeGen/X86/shift-combine.ll
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@ -1,5 +1,4 @@
; RUN: llvm-as < %s | llc | not grep shrl
; XFAIL: *
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"