AMDGPU/GlobalISel: Mark 32-bit G_ADD as legal
Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D33992 llvm-svn: 305232
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@ -34,6 +34,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo() {
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const LLT P1 = LLT::pointer(1, 64);
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const LLT P2 = LLT::pointer(2, 64);
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setAction({G_ADD, S32}, Legal);
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// FIXME: i1 operands to intrinsics should always be legal, but other i1
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// values may not be legal. We need to figure out how to distinguish
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// between these two scenarios.
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@ -0,0 +1,22 @@
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
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--- |
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define void @test_add() { ret void }
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...
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---
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name: test_add
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: %vgpr0, %vgpr1
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; CHECK-LABEL: name: test_add
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; CHECK: %2(s32) = G_ADD %0, %1
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%0(s32) = COPY %vgpr0
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%1(s32) = COPY %vgpr1
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%2(s32) = G_ADD %0, %1
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...
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