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@ -449,7 +449,6 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
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// VNInfo. Insert phi-def VNInfos along the path back to IdxMBB.
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DEBUG(dbgs() << "\n Reaching defs for BB#" << IdxMBB->getNumber()
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<< " at " << Idx << " in " << *LI << '\n');
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DEBUG(dumpCache());
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// Blocks where LI should be live-in.
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SmallVector<MachineDomTreeNode*, 16> LiveIn;
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@ -587,7 +586,6 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
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assert(IdxVNI && "Didn't find value for Idx");
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#ifndef NDEBUG
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DEBUG(dumpCache());
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// Check the LiveOutCache invariants.
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for (LiveOutMap::iterator I = LiveOutCache.begin(), E = LiveOutCache.end();
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I != E; ++I) {
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@ -729,69 +727,86 @@ SplitEditor::SplitEditor(SplitAnalysis &sa,
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LiveRangeEdit &edit)
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: sa_(sa), LIS(lis), VRM(vrm),
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MRI(vrm.getMachineFunction().getRegInfo()),
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MDT(mdt),
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TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
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TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
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Edit(edit),
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DupLI(LIS, mdt, edit.getParent()),
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OpenLI(LIS, mdt, edit.getParent())
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OpenIdx(0),
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RegAssign(Allocator)
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{
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// We don't need an AliasAnalysis since we will only be performing
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// cheap-as-a-copy remats anyway.
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Edit.anyRematerializable(LIS, TII, 0);
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}
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bool SplitEditor::intervalsLiveAt(SlotIndex Idx) const {
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for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I)
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if (*I != DupLI.getLI() && (*I)->liveAt(Idx))
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return true;
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return false;
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void SplitEditor::dump() const {
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if (RegAssign.empty()) {
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dbgs() << " empty\n";
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return;
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}
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for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
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dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
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dbgs() << '\n';
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}
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VNInfo *SplitEditor::defFromParent(LiveIntervalMap &Reg,
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VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
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VNInfo *ParentVNI,
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SlotIndex UseIdx,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) {
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VNInfo *VNI = 0;
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MachineInstr *CopyMI = 0;
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SlotIndex Def;
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LiveInterval *LI = Edit.get(RegIdx);
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// Attempt cheap-as-a-copy rematerialization.
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LiveRangeEdit::Remat RM(ParentVNI);
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if (Edit.canRematerializeAt(RM, UseIdx, true, LIS)) {
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Def = Edit.rematerializeAt(MBB, I, Reg.getLI()->reg, RM,
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LIS, TII, TRI);
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Def = Edit.rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI);
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} else {
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// Can't remat, just insert a copy from parent.
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CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY),
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Reg.getLI()->reg).addReg(Edit.getReg());
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CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
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.addReg(Edit.getReg());
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Def = LIS.InsertMachineInstrInMaps(CopyMI).getDefIndex();
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}
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// Define the value in Reg.
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VNI = Reg.defValue(ParentVNI, Def);
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VNInfo *VNI = LIMappers[RegIdx].defValue(ParentVNI, Def);
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VNI->setCopy(CopyMI);
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// Add minimal liveness for the new value.
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Edit.get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
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if (RegIdx) {
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if (UseIdx < Def)
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UseIdx = Def;
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Reg.getLI()->addRange(LiveRange(Def, UseIdx.getNextSlot(), VNI));
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RegAssign.insert(Def, UseIdx.getNextSlot(), RegIdx);
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}
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return VNI;
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}
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/// Create a new virtual register and live interval.
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void SplitEditor::openIntv() {
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assert(!OpenLI.getLI() && "Previous LI not closed before openIntv");
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if (!DupLI.getLI())
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DupLI.reset(&Edit.create(MRI, LIS, VRM));
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assert(!OpenIdx && "Previous LI not closed before openIntv");
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OpenLI.reset(&Edit.create(MRI, LIS, VRM));
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// Create the complement as index 0.
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if (Edit.empty()) {
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Edit.create(MRI, LIS, VRM);
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LIMappers.push_back(LiveIntervalMap(LIS, MDT, Edit.getParent()));
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LIMappers.back().reset(Edit.get(0));
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}
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// Create the open interval.
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OpenIdx = Edit.size();
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Edit.create(MRI, LIS, VRM);
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LIMappers.push_back(LiveIntervalMap(LIS, MDT, Edit.getParent()));
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LIMappers[OpenIdx].reset(Edit.get(OpenIdx));
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}
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/// enterIntvBefore - Enter OpenLI before the instruction at Idx. If CurLI is
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/// not live before Idx, a COPY is not inserted.
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void SplitEditor::enterIntvBefore(SlotIndex Idx) {
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assert(OpenLI.getLI() && "openIntv not called before enterIntvBefore");
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assert(OpenIdx && "openIntv not called before enterIntvBefore");
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Idx = Idx.getUseIndex();
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DEBUG(dbgs() << " enterIntvBefore " << Idx);
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VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
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@ -800,18 +815,16 @@ void SplitEditor::enterIntvBefore(SlotIndex Idx) {
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return;
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}
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DEBUG(dbgs() << ": valno " << ParentVNI->id);
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truncatedValues.insert(ParentVNI);
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MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
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assert(MI && "enterIntvBefore called with invalid index");
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defFromParent(OpenLI, ParentVNI, Idx, *MI->getParent(), MI);
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DEBUG(dbgs() << ": " << *OpenLI.getLI() << '\n');
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defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
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DEBUG(dump());
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}
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/// enterIntvAtEnd - Enter OpenLI at the end of MBB.
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void SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
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assert(OpenLI.getLI() && "openIntv not called before enterIntvAtEnd");
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assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
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SlotIndex End = LIS.getMBBEndIdx(&MBB).getPrevSlot();
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DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << End);
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VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(End);
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@ -820,9 +833,8 @@ void SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
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return;
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}
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DEBUG(dbgs() << ": valno " << ParentVNI->id);
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truncatedValues.insert(ParentVNI);
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defFromParent(OpenLI, ParentVNI, End, MBB, MBB.getFirstTerminator());
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DEBUG(dbgs() << ": " << *OpenLI.getLI() << '\n');
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defFromParent(OpenIdx, ParentVNI, End, MBB, MBB.getFirstTerminator());
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DEBUG(dump());
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}
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/// useIntv - indicate that all instructions in MBB should use OpenLI.
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@ -831,15 +843,15 @@ void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
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}
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void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
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assert(OpenLI.getLI() && "openIntv not called before useIntv");
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OpenLI.addRange(Start, End);
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DEBUG(dbgs() << " use [" << Start << ';' << End << "): "
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<< *OpenLI.getLI() << '\n');
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assert(OpenIdx && "openIntv not called before useIntv");
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DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
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RegAssign.insert(Start, End, OpenIdx);
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DEBUG(dump());
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}
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/// leaveIntvAfter - Leave OpenLI after the instruction at Idx.
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void SplitEditor::leaveIntvAfter(SlotIndex Idx) {
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assert(OpenLI.getLI() && "openIntv not called before leaveIntvAfter");
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assert(OpenIdx && "openIntv not called before leaveIntvAfter");
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DEBUG(dbgs() << " leaveIntvAfter " << Idx);
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// The interval must be live beyond the instruction at Idx.
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@ -852,20 +864,17 @@ void SplitEditor::leaveIntvAfter(SlotIndex Idx) {
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DEBUG(dbgs() << ": valno " << ParentVNI->id);
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MachineBasicBlock::iterator MII = LIS.getInstructionFromIndex(Idx);
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VNInfo *VNI = defFromParent(DupLI, ParentVNI, Idx,
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VNInfo *VNI = defFromParent(0, ParentVNI, Idx,
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*MII->getParent(), llvm::next(MII));
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// Make sure that OpenLI is properly extended from Idx to the new copy.
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// FIXME: This shouldn't be necessary for remats.
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OpenLI.addSimpleRange(Idx, VNI->def, ParentVNI);
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DEBUG(dbgs() << ": " << *OpenLI.getLI() << '\n');
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RegAssign.insert(Idx, VNI->def, OpenIdx);
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DEBUG(dump());
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}
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/// leaveIntvAtTop - Leave the interval at the top of MBB.
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/// Currently, only one value can leave the interval.
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void SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
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assert(OpenLI.getLI() && "openIntv not called before leaveIntvAtTop");
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assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
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SlotIndex Start = LIS.getMBBStartIdx(&MBB);
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DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
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@ -875,179 +884,130 @@ void SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
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return;
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}
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VNInfo *VNI = defFromParent(DupLI, ParentVNI, Start, MBB,
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VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
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MBB.SkipPHIsAndLabels(MBB.begin()));
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// Finally we must make sure that OpenLI is properly extended from Start to
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// the new copy.
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OpenLI.addSimpleRange(Start, VNI->def, ParentVNI);
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DEBUG(dbgs() << ": " << *OpenLI.getLI() << '\n');
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RegAssign.insert(Start, VNI->def, OpenIdx);
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DEBUG(dump());
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}
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/// closeIntv - Indicate that we are done editing the currently open
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/// LiveInterval, and ranges can be trimmed.
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void SplitEditor::closeIntv() {
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assert(OpenLI.getLI() && "openIntv not called before closeIntv");
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DEBUG(dbgs() << " closeIntv " << *OpenLI.getLI() << '\n');
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OpenLI.reset(0);
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assert(OpenIdx && "openIntv not called before closeIntv");
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OpenIdx = 0;
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}
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/// rewrite - Rewrite all uses of reg to use the new registers.
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void SplitEditor::rewrite(unsigned reg) {
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for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(reg),
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/// rewriteAssigned - Rewrite all uses of Edit.getReg().
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void SplitEditor::rewriteAssigned() {
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for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit.getReg()),
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RE = MRI.reg_end(); RI != RE;) {
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MachineOperand &MO = RI.getOperand();
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unsigned OpNum = RI.getOperandNo();
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MachineInstr *MI = MO.getParent();
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++RI;
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// LiveDebugVariables should have handled all DBG_VALUE instructions.
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if (MI->isDebugValue()) {
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DEBUG(dbgs() << "Zapping " << *MI);
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// FIXME: We can do much better with debug values.
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MO.setReg(0);
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continue;
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}
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SlotIndex Idx = LIS.getInstructionIndex(MI);
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Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex();
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LiveInterval *LI = 0;
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for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E;
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++I) {
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LiveInterval *testli = *I;
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if (testli->liveAt(Idx)) {
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LI = testli;
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break;
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}
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}
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DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'<< Idx);
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assert(LI && "No register was live at use");
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MO.setReg(LI->reg);
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if (MO.isUse() && !MI->isRegTiedToDefOperand(OpNum))
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MO.setIsKill(LI->killedAt(Idx.getDefIndex()));
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DEBUG(dbgs() << '\t' << *MI);
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// Rewrite to the mapped register at Idx.
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unsigned RegIdx = RegAssign.lookup(Idx);
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MO.setReg(Edit.get(RegIdx)->reg);
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DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
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<< Idx << ':' << RegIdx << '\t' << *MI);
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// Extend liveness to Idx.
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const VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
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LIMappers[RegIdx].mapValue(ParentVNI, Idx);
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}
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}
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void
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SplitEditor::addTruncSimpleRange(SlotIndex Start, SlotIndex End, VNInfo *VNI) {
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// Build vector of iterator pairs from the intervals.
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typedef std::pair<LiveInterval::const_iterator,
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LiveInterval::const_iterator> IIPair;
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SmallVector<IIPair, 8> Iters;
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for (LiveRangeEdit::iterator LI = Edit.begin(), LE = Edit.end(); LI != LE;
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++LI) {
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if (*LI == DupLI.getLI())
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/// rewriteSplit - Rewrite uses of Intvs[0] according to the ConEQ mapping.
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void SplitEditor::rewriteComponents(const SmallVectorImpl<LiveInterval*> &Intvs,
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const ConnectedVNInfoEqClasses &ConEq) {
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for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Intvs[0]->reg),
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RE = MRI.reg_end(); RI != RE;) {
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MachineOperand &MO = RI.getOperand();
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MachineInstr *MI = MO.getParent();
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++RI;
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if (MO.isUse() && MO.isUndef())
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continue;
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LiveInterval::const_iterator I = (*LI)->find(Start);
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LiveInterval::const_iterator E = (*LI)->end();
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if (I != E)
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Iters.push_back(std::make_pair(I, E));
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// DBG_VALUE instructions should have been eliminated earlier.
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SlotIndex Idx = LIS.getInstructionIndex(MI);
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Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex();
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DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
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<< Idx << ':');
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const VNInfo *VNI = Intvs[0]->getVNInfoAt(Idx);
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assert(VNI && "Interval not live at use.");
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MO.setReg(Intvs[ConEq.getEqClass(VNI)]->reg);
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DEBUG(dbgs() << VNI->id << '\t' << *MI);
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}
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SlotIndex sidx = Start;
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// Break [Start;End) into segments that don't overlap any intervals.
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for (;;) {
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SlotIndex next = sidx, eidx = End;
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// Find overlapping intervals.
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for (unsigned i = 0; i != Iters.size() && sidx < eidx; ++i) {
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LiveInterval::const_iterator I = Iters[i].first;
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// Interval I is overlapping [sidx;eidx). Trim sidx.
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if (I->start <= sidx) {
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sidx = I->end;
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// Move to the next run, remove iters when all are consumed.
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I = ++Iters[i].first;
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if (I == Iters[i].second) {
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Iters.erase(Iters.begin() + i);
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--i;
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continue;
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}
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}
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// Trim eidx too if needed.
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if (I->start >= eidx)
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continue;
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eidx = I->start;
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next = I->end;
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}
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// Now, [sidx;eidx) doesn't overlap anything in intervals_.
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if (sidx < eidx)
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DupLI.addSimpleRange(sidx, eidx, VNI);
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// If the interval end was truncated, we can try again from next.
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if (next <= sidx)
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break;
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sidx = next;
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}
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}
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void SplitEditor::computeRemainder() {
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// First we need to fill in the live ranges in dupli.
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// If values were redefined, we need a full recoloring with SSA update.
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// If values were truncated, we only need to truncate the ranges.
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// If values were partially rematted, we should shrink to uses.
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// If values were fully rematted, they should be omitted.
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// FIXME: If a single value is redefined, just move the def and truncate.
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LiveInterval &parent = Edit.getParent();
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DEBUG(dbgs() << "computeRemainder from " << parent << '\n');
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// Values that are fully contained in the split intervals.
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SmallPtrSet<const VNInfo*, 8> deadValues;
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// Map all CurLI values that should have live defs in dupli.
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for (LiveInterval::const_vni_iterator I = parent.vni_begin(),
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E = parent.vni_end(); I != E; ++I) {
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const VNInfo *VNI = *I;
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// Don't transfer unused values to the new intervals.
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if (VNI->isUnused())
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continue;
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// Original def is contained in the split intervals.
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if (intervalsLiveAt(VNI->def)) {
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// Did this value escape?
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if (DupLI.isMapped(VNI))
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truncatedValues.insert(VNI);
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else
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deadValues.insert(VNI);
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continue;
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}
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// Add minimal live range at the definition.
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VNInfo *DVNI = DupLI.defValue(VNI, VNI->def);
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DupLI.getLI()->addRange(LiveRange(VNI->def, VNI->def.getNextSlot(), DVNI));
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}
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// Add all ranges to dupli.
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for (LiveInterval::const_iterator I = parent.begin(), E = parent.end();
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I != E; ++I) {
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const LiveRange &LR = *I;
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if (truncatedValues.count(LR.valno)) {
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// recolor after removing intervals_.
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addTruncSimpleRange(LR.start, LR.end, LR.valno);
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} else if (!deadValues.count(LR.valno)) {
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// recolor without truncation.
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DupLI.addSimpleRange(LR.start, LR.end, LR.valno);
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}
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}
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// Extend DupLI to be live out of any critical loop predecessors.
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// This means we have multiple registers live out of those blocks.
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// The alternative would be to split the critical edges.
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if (criticalPreds_.empty())
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return;
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for (SplitAnalysis::BlockPtrSet::iterator I = criticalPreds_.begin(),
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E = criticalPreds_.end(); I != E; ++I)
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DupLI.extendTo(*I, LIS.getMBBEndIdx(*I).getPrevSlot());
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criticalPreds_.clear();
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}
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void SplitEditor::finish() {
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assert(!OpenLI.getLI() && "Previous LI not closed before rewrite");
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assert(DupLI.getLI() && "No dupli for rewrite. Noop spilt?");
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assert(OpenIdx == 0 && "Previous LI not closed before rewrite");
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// Complete dupli liveness.
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computeRemainder();
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// At this point, the live intervals in Edit contain VNInfos corresponding to
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// the inserted copies.
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// Add the original defs from the parent interval.
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for (LiveInterval::const_vni_iterator I = Edit.getParent().vni_begin(),
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E = Edit.getParent().vni_end(); I != E; ++I) {
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const VNInfo *ParentVNI = *I;
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LiveIntervalMap &LIM = LIMappers[RegAssign.lookup(ParentVNI->def)];
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VNInfo *VNI = LIM.defValue(ParentVNI, ParentVNI->def);
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LIM.getLI()->addRange(LiveRange(ParentVNI->def,
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ParentVNI->def.getNextSlot(), VNI));
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// Mark all values as complex to force liveness computation.
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// This should really only be necessary for remat victims, but we are lazy.
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LIM.markComplexMapped(ParentVNI);
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}
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#ifndef NDEBUG
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// Every new interval must have a def by now, otherwise the split is bogus.
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for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I)
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assert((*I)->hasAtLeastOneValue() && "Split interval has no value");
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#endif
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// FIXME: Don't recompute the liveness of all values, infer it from the
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// overlaps between the parent live interval and RegAssign.
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// The mapValue algorithm is only necessary when:
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// - The parent value maps to multiple defs, and new phis are needed, or
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// - The value has been rematerialized before some uses, and we want to
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// minimize the live range so it only reaches the remaining uses.
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// All other values have simple liveness that can be computed from RegAssign
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// and the parent live interval.
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// Extend live ranges to be live-out for successor PHI values.
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for (LiveInterval::const_vni_iterator I = Edit.getParent().vni_begin(),
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E = Edit.getParent().vni_end(); I != E; ++I) {
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const VNInfo *PHIVNI = *I;
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if (!PHIVNI->isPHIDef())
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continue;
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LiveIntervalMap &LIM = LIMappers[RegAssign.lookup(PHIVNI->def)];
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MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
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for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
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PE = MBB->pred_end(); PI != PE; ++PI) {
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SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
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// The predecessor may not have a live-out value. That is OK, like an
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// undef PHI operand.
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if (VNInfo *VNI = Edit.getParent().getVNInfoAt(End))
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LIM.mapValue(VNI, End);
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}
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}
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// Rewrite instructions.
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rewriteAssigned();
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// FIXME: Delete defs that were rematted everywhere.
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// Get rid of unused values and set phi-kill flags.
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for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I)
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(*I)->RenumberValues(LIS);
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// Rewrite instructions.
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rewrite(Edit.getReg());
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// Now check if any registers were separated into multiple components.
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ConnectedVNInfoEqClasses ConEQ(LIS);
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for (unsigned i = 0, e = Edit.size(); i != e; ++i) {
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@ -1061,9 +1021,8 @@ void SplitEditor::finish() {
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dups.push_back(li);
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for (unsigned i = 1; i != NumComp; ++i)
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dups.push_back(&Edit.create(MRI, LIS, VRM));
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rewriteComponents(dups, ConEQ);
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ConEQ.Distribute(&dups[0]);
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// Rewrite uses to the new regs.
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rewrite(li->reg);
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}
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// Calculate spill weight and allocation hints for new intervals.
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@ -1095,9 +1054,6 @@ void SplitEditor::splitAroundLoop(const MachineLoop *Loop) {
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sa_.getCriticalExits(Blocks, CriticalExits);
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assert(CriticalExits.empty() && "Cannot break critical exits yet");
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// Get critical predecessors so computeRemainder can deal with them.
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sa_.getCriticalPreds(Blocks, criticalPreds_);
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// Create new live interval for the loop.
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openIntv();
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