Call EmitFunctionHeader just before EmitFunctionBody.
This avoids switching to .AMDGPU.config and back and hardcoding the section it switches back to. llvm-svn: 232479
This commit is contained in:
Rafael Espindola
parent
5345e420c4
commit
ec8da3de01
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@ -105,8 +105,6 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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SetupMachineFunction(MF);
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EmitFunctionHeader();
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MCContext &Context = getObjFileLowering().getContext();
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const MCSectionELF *ConfigSection =
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Context.getELFSection(".AMDGPU.config", ELF::SHT_PROGBITS, 0);
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@ -129,7 +127,7 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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HexLines.clear();
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DisasmLineMaxLen = 0;
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OutStreamer.SwitchSection(getObjFileLowering().getTextSection());
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EmitFunctionHeader();
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EmitFunctionBody();
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if (isVerbose()) {
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@ -2,11 +2,11 @@
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; RUN: llc < %s -march=r600 -mcpu=redwood -show-mc-encoding -o - | FileCheck --check-prefix=EG %s
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; RUN: llc < %s -march=r600 -mcpu=rv710 -show-mc-encoding -o - | FileCheck --check-prefix=R600 %s
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; EG: {{^}}call_fs:
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; EG: .long 257
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; EG: {{^}}call_fs:
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; EG: CALL_FS ; encoding: [0x00,0x00,0x00,0x00,0x00,0x00,0xc0,0x84]
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; R600: {{^}}call_fs:
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; R600: .long 257
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; R600: {{^}}call_fs:
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; R600:CALL_FS ; encoding: [0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x89]
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@ -13,12 +13,12 @@
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; ELF: Name: test
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; ELF: Binding: Global
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; CONFIG: .align 256
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; CONFIG: test:
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; CONFIG: .section .AMDGPU.config
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; CONFIG-NEXT: .long 45096
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; TYPICAL-NEXT: .long 0
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; TONGA-NEXT: .long 576
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; CONFIG: .align 256
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; CONFIG: test:
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define void @test(i32 %p) #0 {
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%i = add i32 %p, 2
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%r = bitcast i32 %i to float
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@ -3,16 +3,16 @@
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; Make sure we don't assert on empty functions
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; SI-LABEL: {{^}}empty_function_ret:
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; SI: .text
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; SI-LABEL: {{^}}empty_function_ret:
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; SI: s_endpgm
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; SI: codeLenInByte = 4
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define void @empty_function_ret() #0 {
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ret void
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}
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; SI-LABEL: {{^}}empty_function_unreachable:
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; SI: .text
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; SI-LABEL: {{^}}empty_function_unreachable:
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; SI: codeLenInByte = 0
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define void @empty_function_unreachable() #0 {
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unreachable
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@ -1,8 +1,8 @@
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; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s
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; HSA: {{^}}simple:
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; HSA: .section .hsa.version
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; HSA-NEXT: .ascii "HSA Code Unit:0.0:AMD:0.1:GFX8.1:0"
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; HSA: {{^}}simple:
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; Make sure we are setting the ATC bit:
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; HSA: s_mov_b32 s[[HI:[0-9]]], 0x100f000
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; HSA: buffer_store_dword v{{[0-9]+}}, s[0:[[HI]]], 0
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@ -3,9 +3,9 @@
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; This test makes sure we do not double count global values when they are
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; used in different basic blocks.
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; CHECK-LABEL: {{^}}test:
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; CHECK: .long 166120
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; CHECK-NEXT: .long 1
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; CHECK-LABEL: {{^}}test:
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@lds = internal unnamed_addr addrspace(3) global i32 undef, align 4
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define void @test(i32 addrspace(1)* %out, i32 %cond) {
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@ -5,7 +5,6 @@
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@local_memory_two_objects.local_mem0 = internal unnamed_addr addrspace(3) global [4 x i32] undef, align 4
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@local_memory_two_objects.local_mem1 = internal unnamed_addr addrspace(3) global [4 x i32] undef, align 4
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; EG: {{^}}local_memory_two_objects:
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; Check that the LDS size emitted correctly
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; EG: .long 166120
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@ -13,6 +12,8 @@
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; GCN: .long 47180
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; GCN-NEXT: .long 38792
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; EG: {{^}}local_memory_two_objects:
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; We would like to check the the lds writes are using different
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; addresses, but due to variations in the scheduler, we can't do
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; this consistently on evergreen GPUs.
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@ -4,7 +4,6 @@
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@local_memory.local_mem = internal unnamed_addr addrspace(3) global [128 x i32] undef, align 4
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; FUNC-LABEL: {{^}}local_memory:
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; Check that the LDS size emitted correctly
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; EG: .long 166120
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@ -14,6 +13,8 @@
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; CI: .long 47180
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; CI-NEXT: .long 38792
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; FUNC-LABEL: {{^}}local_memory:
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; EG: LDS_WRITE
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; SI-NOT: s_wqm_b64
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; SI: ds_write_b32
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@ -554,8 +554,8 @@ define void @sextload_i8_to_i32_bfe(i32 addrspace(1)* %out, i8 addrspace(1)* %pt
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ret void
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}
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; FUNC-LABEL: {{^}}sextload_i8_to_i32_bfe_0:
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; SI: .text
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; FUNC-LABEL: {{^}}sextload_i8_to_i32_bfe_0:{{.*$}}
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; SI-NOT: {{[^@]}}bfe
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; SI: s_endpgm
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define void @sextload_i8_to_i32_bfe_0(i32 addrspace(1)* %out, i8 addrspace(1)* %ptr) nounwind {
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