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Revert rL334371 / D47980: "[InstCombine] Fold (x << y) >> y -> x & (-1 >> y)" 

test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll broke,
and i did not notice because i did not build that backend.

llvm-svn: 334373
This commit is contained in:
Roman Lebedev 2018-06-10 20:32:03 +00:00
parent eb795a0661
commit ebb3252f00
2 changed files with 6 additions and 14 deletions
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9
llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
View File

@ -811,15 +811,6 @@ Instruction *InstCombiner::visitLShr(BinaryOperator &I) {
return &I;
}
}
// Transform (x << y) >> y to x & (-1 >> y)
Value *X;
if (match(Op0, m_OneUse(m_Shl(m_Value(X), m_Specific(Op1))))) {
Constant *AllOnes = ConstantInt::getAllOnesValue(Ty);
Value *Mask = Builder.CreateLShr(AllOnes, Op1);
return BinaryOperator::CreateAnd(Mask, X);
}
return nullptr;
}

11
llvm/test/Transforms/InstCombine/canonicalize-shl-lshr-to-masking.ll
View File

@ -14,8 +14,8 @@
define i32 @positive_samevar(i32 %x, i32 %y) {
; CHECK-LABEL: @positive_samevar(
; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 -1, [[Y:%.*]]
; CHECK-NEXT: [[RET:%.*]] = and i32 [[TMP1]], [[X:%.*]]
; CHECK-NEXT: [[TMP0:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[RET:%.*]] = lshr i32 [[TMP0]], [[Y]]
; CHECK-NEXT: ret i32 [[RET]]
;
%tmp0 = shl i32 %x, %y
@ -124,8 +124,8 @@ define i32 @positive_biggerLshr_shlnuw_lshrexact(i32 %x) {
define <2 x i32> @positive_samevar_vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @positive_samevar_vec(
; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i32> <i32 -1, i32 -1>, [[Y:%.*]]
; CHECK-NEXT: [[RET:%.*]] = and <2 x i32> [[TMP1]], [[X:%.*]]
; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i32> [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[RET:%.*]] = lshr <2 x i32> [[TMP0]], [[Y]]
; CHECK-NEXT: ret <2 x i32> [[RET]]
;
%tmp0 = shl <2 x i32> %x, %y
@ -171,7 +171,8 @@ define <3 x i32> @positive_sameconst_vec_undef1(<3 x i32> %x) {
define <3 x i32> @positive_sameconst_vec_undef2(<3 x i32> %x) {
; CHECK-LABEL: @positive_sameconst_vec_undef2(
; CHECK-NEXT: [[RET:%.*]] = and <3 x i32> [[X:%.*]], <i32 134217727, i32 undef, i32 134217727>
; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i32> [[X:%.*]], <i32 5, i32 undef, i32 5>
; CHECK-NEXT: [[RET:%.*]] = lshr <3 x i32> [[TMP0]], <i32 5, i32 undef, i32 5>
; CHECK-NEXT: ret <3 x i32> [[RET]]
;
%tmp0 = shl <3 x i32> %x, <i32 5, i32 undef, i32 5>