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[LV] Change MaxVectorSize bound to 256 in assertion, NFC otherwise 

It's possible to have a vector of 256 bytes in HVX code on Hexagon
(vector pair in 128-byte mode).

llvm-svn: 331885
This commit is contained in:
Krzysztof Parzyszek 2018-05-09 15:18:12 +00:00
parent b1bcafd706
commit ea4c1bb772
1 changed files with 2 additions and 2 deletions
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4
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
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@ -4937,8 +4937,8 @@ LoopVectorizationCostModel::computeFeasibleMaxVF(bool OptForSize,
DEBUG(dbgs() << "LV: The Widest register safe to use is: " << WidestRegister
<< " bits.\n");
assert(MaxVectorSize <= 64 && "Did not expect to pack so many elements"
" into one vector!");
assert(MaxVectorSize <= 256 && "Did not expect to pack so many elements"
" into one vector!");
if (MaxVectorSize == 0) {
DEBUG(dbgs() << "LV: The target has no vector registers.\n");
MaxVectorSize = 1;