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[COFF] Implement support for IMAGE_REL_ARM64_ADDR32NB 

This is implemented in the same way as the other ADDR32NB relocations
for ARM and X64.

Differential Revision: https://reviews.llvm.org/D38815

llvm-svn: 315561
This commit is contained in:
Martin Storsjo 2017-10-12 05:37:06 +00:00
parent cd063a9c7a
commit ea460a2d0c
2 changed files with 11 additions and 5 deletions
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1
lld/COFF/Chunks.cpp
View File

@ -222,6 +222,7 @@ void SectionChunk::applyRelARM64(uint8_t *Off, uint16_t Type, OutputSection *OS,
case IMAGE_REL_ARM64_PAGEOFFSET_12L: applyArm64Ldr(Off, S & 0xfff); break;
case IMAGE_REL_ARM64_BRANCH26: or32(Off, ((S - P) & 0x0FFFFFFC) >> 2); break;
case IMAGE_REL_ARM64_ADDR32: add32(Off, S + Config->ImageBase); break;
case IMAGE_REL_ARM64_ADDR32NB: add32(Off, S); break;
case IMAGE_REL_ARM64_ADDR64: add64(Off, S + Config->ImageBase); break;
default:
fatal("unsupported relocation type 0x" + Twine::utohexstr(Type));

15
lld/test/COFF/arm64-relocs-imports.test
View File

@ -36,12 +36,13 @@
# BEFORE: 6c: c0 03 5f d6 ret
# BEFORE: 70: 08 00 00 00 <unknown>
# BEFORE: 74: 00 00 00 00 <unknown>
# BEFORE: 78: 01 00 00 00 <unknown>
# AFTER: Disassembly of section .text:
# AFTER: 140002000: fe 0f 1f f8 str x30, [sp, #-16]!
# AFTER: 140002004: e0 ff ff f0 adrp x0, #-4096
# AFTER: 140002008: 00 18 00 91 add x0, x0, #6
# AFTER: 14000200c: 1b 00 00 94 bl #108
# AFTER: 14000200c: 1c 00 00 94 bl #112
# AFTER: 140002010: 00 21 40 39 ldrb w0, [x8, #8]
# AFTER: 140002014: 00 11 40 79 ldrh w0, [x8, #8]
# AFTER: 140002018: 00 09 40 b9 ldr w0, [x8, #8]
@ -68,9 +69,10 @@
# AFTER: 14000206c: c0 03 5f d6 ret
# AFTER: 140002070: 10 10 00 40 <unknown>
# AFTER: 140002074: 01 00 00 00 <unknown>
# AFTER: 140002078: 10 00 00 b0 adrp x16, #4096
# AFTER: 14000207c: 10 1e 40 f9 ldr x16, [x16, #56]
# AFTER: 140002080: 00 02 1f d6 br x16
# AFTER: 140002078: 09 10 00 00 <unknown>
# AFTER: 14000207c: 10 00 00 b0 adrp x16, #4096
# AFTER: 140002080: 10 1e 40 f9 ldr x16, [x16, #56]
# AFTER: 140002084: 00 02 1f d6 br x16
--- !COFF
header:
@ -80,7 +82,7 @@ sections:
- Name: .text
Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
Alignment: 4
SectionData: FE0F1FF80000009000080091000000940001403900014079000140B9000140F90001003900010079000100B9000100F90001403D0001407D000140BD000140FD0001C03D0001003D0001007D000100BD000100FD0001803D000540F9201A01B000FC4FF9E0031F2AFE0741F8C0035FD60800000000000000
SectionData: FE0F1FF80000009000080091000000940001403900014079000140B9000140F90001003900010079000100B9000100F90001403D0001407D000140BD000140FD0001C03D0001003D0001007D000100BD000100FD0001803D000540F9201A01B000FC4FF9E0031F2AFE0741F8C0035FD6080000000000000001000000
Relocations:
- VirtualAddress: 4
SymbolName: .Lstr
@ -157,6 +159,9 @@ sections:
- VirtualAddress: 112
SymbolName: .Lglobal
Type: 14
- VirtualAddress: 120
SymbolName: .Lglobal
Type: 2
- Name: .data
Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_READ, IMAGE_SCN_MEM_WRITE ]
Alignment: 4