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tsan: fix int overflow and several instances where tid is used with ignore 

llvm-svn: 169029
This commit is contained in:
Dmitry Vyukov 2012-11-30 20:02:11 +00:00
parent 406ea51cfb
commit e993dac233
3 changed files with 8 additions and 3 deletions
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2
compiler-rt/lib/tsan/rtl/tsan_platform.h
View File

@ -139,7 +139,7 @@ const char *InitializePlatform();
void FinalizePlatform();
void MapThreadTrace(uptr addr, uptr size);
uptr ALWAYS_INLINE INLINE GetThreadTrace(int tid) {
uptr p = kTraceMemBegin + tid * kTraceSize * sizeof(Event);
uptr p = kTraceMemBegin + (uptr)tid * kTraceSize * sizeof(Event);
DCHECK_LT(p, kTraceMemBegin + kTraceMemSize);
return p;
}

2
compiler-rt/lib/tsan/rtl/tsan_rtl.cc
View File

@ -359,7 +359,7 @@ static inline bool OldIsInSameSynchEpoch(Shadow old, ThreadState *thr) {
}
static inline bool HappensBefore(Shadow old, ThreadState *thr) {
return thr->clock.get(old.tid()) >= old.epoch();
return thr->clock.get(old.TidWithIgnore()) >= old.epoch();
}
ALWAYS_INLINE

7
compiler-rt/lib/tsan/rtl/tsan_rtl.h
View File

@ -94,6 +94,11 @@ class FastState {
}
u64 tid() const {
u64 res = (x_ & ~kIgnoreBit) >> kTidShift;
return res;
}
u64 TidWithIgnore() const {
u64 res = x_ >> kTidShift;
return res;
}
@ -182,7 +187,7 @@ class Shadow : public FastState {
static inline bool TidsAreEqual(const Shadow s1, const Shadow s2) {
u64 shifted_xor = (s1.x_ ^ s2.x_) >> kTidShift;
DCHECK_EQ(shifted_xor == 0, s1.tid() == s2.tid());
DCHECK_EQ(shifted_xor == 0, s1.TidWithIgnore() == s2.TidWithIgnore());
return shifted_xor == 0;
}