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Make analyzeBranch family of instruction names consistent 

analyzeBranch was renamed to use lowercase first, rename
the related set to match.

llvm-svn: 281506
This commit is contained in:
Matt Arsenault 2016-09-14 17:24:15 +00:00
parent a2b036e88b
commit e8e0f5cac6
47 changed files with 101 additions and 101 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
llvm/include/llvm/Target/TargetInstrInfo.h
View File

@ -462,7 +462,7 @@ public:
/// condition. These operands can be passed to other TargetInstrInfo
/// methods to create new branches.
///
/// Note that RemoveBranch and InsertBranch must be implemented to support
/// Note that RemoveBranch and insertBranch must be implemented to support
/// cases where this method returns success.
///
/// If AllowModify is true, then this routine is allowed to modify the basic
@ -545,19 +545,19 @@ public:
///
/// The CFG information in MBB.Predecessors and MBB.Successors must be valid
/// before calling this function.
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
virtual unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const {
llvm_unreachable("Target didn't implement TargetInstrInfo::InsertBranch!");
llvm_unreachable("Target didn't implement TargetInstrInfo::insertBranch!");
}
unsigned insertUnconditionalBranch(MachineBasicBlock &MBB,
MachineBasicBlock *DestBB,
const DebugLoc &DL,
int *BytesAdded = nullptr) const {
return InsertBranch(MBB, DestBB, nullptr,
return insertBranch(MBB, DestBB, nullptr,
ArrayRef<MachineOperand>(), DL, BytesAdded);
}

24
llvm/lib/CodeGen/BranchFolding.cpp
View File

@ -517,12 +517,12 @@ static void FixTail(MachineBasicBlock *CurMBB, MachineBasicBlock *SuccBB,
if (TBB == NextBB && !Cond.empty() && !FBB) {
if (!TII->ReverseBranchCondition(Cond)) {
TII->RemoveBranch(*CurMBB);
TII->InsertBranch(*CurMBB, SuccBB, nullptr, Cond, dl);
TII->insertBranch(*CurMBB, SuccBB, nullptr, Cond, dl);
return;
}
}
}
TII->InsertBranch(*CurMBB, SuccBB, nullptr,
TII->insertBranch(*CurMBB, SuccBB, nullptr,
SmallVector<MachineOperand, 0>(), dl);
}
@ -1110,7 +1110,7 @@ bool BranchFolder::TailMergeBlocks(MachineFunction &MF) {
TII->RemoveBranch(*PBB);
if (!Cond.empty())
// reinsert conditional branch only, for now
TII->InsertBranch(*PBB, (TBB == IBB) ? FBB : TBB, nullptr,
TII->insertBranch(*PBB, (TBB == IBB) ? FBB : TBB, nullptr,
NewCond, dl);
}
@ -1329,7 +1329,7 @@ ReoptimizeBlock:
TII->RemoveBranch(PrevBB);
PriorCond.clear();
if (PriorTBB != MBB)
TII->InsertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
TII->insertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
MadeChange = true;
++NumBranchOpts;
goto ReoptimizeBlock;
@ -1385,7 +1385,7 @@ ReoptimizeBlock:
if (PriorFBB == MBB) {
DebugLoc dl = getBranchDebugLoc(PrevBB);
TII->RemoveBranch(PrevBB);
TII->InsertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
TII->insertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
MadeChange = true;
++NumBranchOpts;
goto ReoptimizeBlock;
@ -1399,7 +1399,7 @@ ReoptimizeBlock:
if (!TII->ReverseBranchCondition(NewPriorCond)) {
DebugLoc dl = getBranchDebugLoc(PrevBB);
TII->RemoveBranch(PrevBB);
TII->InsertBranch(PrevBB, PriorFBB, nullptr, NewPriorCond, dl);
TII->insertBranch(PrevBB, PriorFBB, nullptr, NewPriorCond, dl);
MadeChange = true;
++NumBranchOpts;
goto ReoptimizeBlock;
@ -1437,7 +1437,7 @@ ReoptimizeBlock:
DebugLoc dl = getBranchDebugLoc(PrevBB);
TII->RemoveBranch(PrevBB);
TII->InsertBranch(PrevBB, MBB, nullptr, NewPriorCond, dl);
TII->insertBranch(PrevBB, MBB, nullptr, NewPriorCond, dl);
// Move this block to the end of the function.
MBB->moveAfter(&MF.back());
@ -1504,7 +1504,7 @@ ReoptimizeBlock:
if (!TII->ReverseBranchCondition(NewCond)) {
DebugLoc dl = getBranchDebugLoc(*MBB);
TII->RemoveBranch(*MBB);
TII->InsertBranch(*MBB, CurFBB, CurTBB, NewCond, dl);
TII->insertBranch(*MBB, CurFBB, CurTBB, NewCond, dl);
MadeChange = true;
++NumBranchOpts;
goto ReoptimizeBlock;
@ -1552,7 +1552,7 @@ ReoptimizeBlock:
}
DebugLoc pdl = getBranchDebugLoc(PrevBB);
TII->RemoveBranch(PrevBB);
TII->InsertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, pdl);
TII->insertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, pdl);
}
// Iterate through all the predecessors, revectoring each in-turn.
@ -1579,7 +1579,7 @@ ReoptimizeBlock:
DebugLoc pdl = getBranchDebugLoc(*PMBB);
TII->RemoveBranch(*PMBB);
NewCurCond.clear();
TII->InsertBranch(*PMBB, NewCurTBB, nullptr, NewCurCond, pdl);
TII->insertBranch(*PMBB, NewCurTBB, nullptr, NewCurCond, pdl);
MadeChange = true;
++NumBranchOpts;
PMBB->CorrectExtraCFGEdges(NewCurTBB, nullptr, false);
@ -1599,7 +1599,7 @@ ReoptimizeBlock:
}
// Add the branch back if the block is more than just an uncond branch.
TII->InsertBranch(*MBB, CurTBB, nullptr, CurCond, dl);
TII->insertBranch(*MBB, CurTBB, nullptr, CurCond, dl);
}
}
@ -1636,7 +1636,7 @@ ReoptimizeBlock:
if (CurFallsThru) {
MachineBasicBlock *NextBB = &*std::next(MBB->getIterator());
CurCond.clear();
TII->InsertBranch(*MBB, NextBB, nullptr, CurCond, DebugLoc());
TII->insertBranch(*MBB, NextBB, nullptr, CurCond, DebugLoc());
}
MBB->moveAfter(PredBB);
MadeChange = true;

2
llvm/lib/CodeGen/EarlyIfConversion.cpp
View File

@ -574,7 +574,7 @@ void SSAIfConv::convertIf(SmallVectorImpl<MachineBasicBlock*> &RemovedBlocks) {
// We need a branch to Tail, let code placement work it out later.
DEBUG(dbgs() << "Converting to unconditional branch.\n");
SmallVector<MachineOperand, 0> EmptyCond;
TII->InsertBranch(*Head, Tail, nullptr, EmptyCond, HeadDL);
TII->insertBranch(*Head, Tail, nullptr, EmptyCond, HeadDL);
Head->addSuccessor(Tail);
}
DEBUG(dbgs() << *Head);

8
llvm/lib/CodeGen/IfConversion.cpp
View File

@ -505,7 +505,7 @@ bool IfConverter::ReverseBranchCondition(BBInfo &BBI) const {
DebugLoc dl; // FIXME: this is nowhere
if (!TII->ReverseBranchCondition(BBI.BrCond)) {
TII->RemoveBranch(*BBI.BB);
TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
TII->insertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
std::swap(BBI.TrueBB, BBI.FalseBB);
return true;
}
@ -1394,7 +1394,7 @@ static void InsertUncondBranch(MachineBasicBlock &MBB, MachineBasicBlock &ToMBB,
const TargetInstrInfo *TII) {
DebugLoc dl; // FIXME: this is nowhere
SmallVector<MachineOperand, 0> NoCond;
TII->InsertBranch(MBB, &ToMBB, nullptr, NoCond, dl);
TII->insertBranch(MBB, &ToMBB, nullptr, NoCond, dl);
}
/// Remove true / false edges if either / both are no longer successors.
@ -1667,7 +1667,7 @@ bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
BBI.BB->setSuccProbability(NewTrueBBIter, NewNext);
auto NewFalse = BBCvt * CvtFalse;
TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, nullptr, RevCond, dl);
TII->insertBranch(*BBI.BB, CvtBBI->FalseBB, nullptr, RevCond, dl);
BBI.BB->addSuccessor(CvtBBI->FalseBB, NewFalse);
}
@ -1951,7 +1951,7 @@ bool IfConverter::IfConvertForkedDiamond(
// Add back the branch.
// Debug location saved above when removing the branch from BBI2
TII->InsertBranch(*BBI.BB, TrueBBI.TrueBB, TrueBBI.FalseBB,
TII->insertBranch(*BBI.BB, TrueBBI.TrueBB, TrueBBI.FalseBB,
TrueBBI.BrCond, dl);
RemoveExtraEdges(BBI);

2
llvm/lib/CodeGen/ImplicitNullChecks.cpp
View File

@ -560,7 +560,7 @@ void ImplicitNullChecks::rewriteNullChecks(
NC.getCheckOperation()->eraseFromParent();
// Insert an *unconditional* branch to not-null successor.
TII->InsertBranch(*NC.getCheckBlock(), NC.getNotNullSucc(), nullptr,
TII->insertBranch(*NC.getCheckBlock(), NC.getNotNullSucc(), nullptr,
/*Cond=*/None, DL);
NumImplicitNullChecks++;

18
llvm/lib/CodeGen/MachineBasicBlock.cpp
View File

@ -436,7 +436,7 @@ void MachineBasicBlock::updateTerminator() {
// Finally update the unconditional successor to be reached via a branch
// if it would not be reached by fallthrough.
if (!isLayoutSuccessor(TBB))
TII->InsertBranch(*this, TBB, nullptr, Cond, DL);
TII->insertBranch(*this, TBB, nullptr, Cond, DL);
}
return;
}
@ -449,10 +449,10 @@ void MachineBasicBlock::updateTerminator() {
if (TII->ReverseBranchCondition(Cond))
return;
TII->RemoveBranch(*this);
TII->InsertBranch(*this, FBB, nullptr, Cond, DL);
TII->insertBranch(*this, FBB, nullptr, Cond, DL);
} else if (isLayoutSuccessor(FBB)) {
TII->RemoveBranch(*this);
TII->InsertBranch(*this, TBB, nullptr, Cond, DL);
TII->insertBranch(*this, TBB, nullptr, Cond, DL);
}
return;
}
@ -479,7 +479,7 @@ void MachineBasicBlock::updateTerminator() {
// Finally update the unconditional successor to be reached via a branch if
// it would not be reached by fallthrough.
if (!isLayoutSuccessor(TBB))
TII->InsertBranch(*this, TBB, nullptr, Cond, DL);
TII->insertBranch(*this, TBB, nullptr, Cond, DL);
return;
}
@ -488,7 +488,7 @@ void MachineBasicBlock::updateTerminator() {
// change the conditional branch into unconditional branch.
TII->RemoveBranch(*this);
Cond.clear();
TII->InsertBranch(*this, TBB, nullptr, Cond, DL);
TII->insertBranch(*this, TBB, nullptr, Cond, DL);
return;
}
@ -497,14 +497,14 @@ void MachineBasicBlock::updateTerminator() {
if (TII->ReverseBranchCondition(Cond)) {
// We can't reverse the condition, add an unconditional branch.
Cond.clear();
TII->InsertBranch(*this, FallthroughBB, nullptr, Cond, DL);
TII->insertBranch(*this, FallthroughBB, nullptr, Cond, DL);
return;
}
TII->RemoveBranch(*this);
TII->InsertBranch(*this, FallthroughBB, nullptr, Cond, DL);
TII->insertBranch(*this, FallthroughBB, nullptr, Cond, DL);
} else if (!isLayoutSuccessor(FallthroughBB)) {
TII->RemoveBranch(*this);
TII->InsertBranch(*this, TBB, FallthroughBB, Cond, DL);
TII->insertBranch(*this, TBB, FallthroughBB, Cond, DL);
}
}
@ -810,7 +810,7 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ,
if (!NMBB->isLayoutSuccessor(Succ)) {
SmallVector<MachineOperand, 4> Cond;
const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
TII->InsertBranch(*NMBB, Succ, nullptr, Cond, DL);
TII->insertBranch(*NMBB, Succ, nullptr, Cond, DL);
if (Indexes) {
for (MachineInstr &MI : NMBB->instrs()) {

2
llvm/lib/CodeGen/MachineBlockPlacement.cpp
View File

@ -1643,7 +1643,7 @@ void MachineBlockPlacement::optimizeBranches() {
<< MBPI->getEdgeProbability(ChainBB, TBB) << "\n");
DebugLoc dl; // FIXME: this is nowhere
TII->RemoveBranch(*ChainBB);
TII->InsertBranch(*ChainBB, FBB, TBB, Cond, dl);
TII->insertBranch(*ChainBB, FBB, TBB, Cond, dl);
ChainBB->updateTerminator();
}
}

12
llvm/lib/CodeGen/MachinePipeliner.cpp
View File

@ -2366,7 +2366,7 @@ void SwingSchedulerDAG::generateProlog(SMSchedule &Schedule, unsigned LastStage,
unsigned numBranches = TII->RemoveBranch(*PreheaderBB);
if (numBranches) {
SmallVector<MachineOperand, 0> Cond;
TII->InsertBranch(*PreheaderBB, PrologBBs[0], nullptr, Cond, DebugLoc());
TII->insertBranch(*PreheaderBB, PrologBBs[0], nullptr, Cond, DebugLoc());
}
}
@ -2453,12 +2453,12 @@ void SwingSchedulerDAG::generateEpilog(SMSchedule &Schedule, unsigned LastStage,
// Create a branch to the new epilog from the kernel.
// Remove the original branch and add a new branch to the epilog.
TII->RemoveBranch(*KernelBB);
TII->InsertBranch(*KernelBB, KernelBB, EpilogStart, Cond, DebugLoc());
TII->insertBranch(*KernelBB, KernelBB, EpilogStart, Cond, DebugLoc());
// Add a branch to the loop exit.
if (EpilogBBs.size() > 0) {
MachineBasicBlock *LastEpilogBB = EpilogBBs.back();
SmallVector<MachineOperand, 4> Cond1;
TII->InsertBranch(*LastEpilogBB, LoopExitBB, nullptr, Cond1, DebugLoc());
TII->insertBranch(*LastEpilogBB, LoopExitBB, nullptr, Cond1, DebugLoc());
}
}
@ -3013,12 +3013,12 @@ void SwingSchedulerDAG::addBranches(MBBVectorTy &PrologBBs,
unsigned numAdded = 0;
if (TargetRegisterInfo::isVirtualRegister(LC)) {
Prolog->addSuccessor(Epilog);
numAdded = TII->InsertBranch(*Prolog, Epilog, LastPro, Cond, DebugLoc());
numAdded = TII->insertBranch(*Prolog, Epilog, LastPro, Cond, DebugLoc());
} else if (j >= LCMin) {
Prolog->addSuccessor(Epilog);
Prolog->removeSuccessor(LastPro);
LastEpi->removeSuccessor(Epilog);
numAdded = TII->InsertBranch(*Prolog, Epilog, nullptr, Cond, DebugLoc());
numAdded = TII->insertBranch(*Prolog, Epilog, nullptr, Cond, DebugLoc());
removePhis(Epilog, LastEpi);
// Remove the blocks that are no longer referenced.
if (LastPro != LastEpi) {
@ -3028,7 +3028,7 @@ void SwingSchedulerDAG::addBranches(MBBVectorTy &PrologBBs,
LastPro->clear();
LastPro->eraseFromParent();
} else {
numAdded = TII->InsertBranch(*Prolog, LastPro, nullptr, Cond, DebugLoc());
numAdded = TII->insertBranch(*Prolog, LastPro, nullptr, Cond, DebugLoc());
removePhis(Epilog, Prolog);
}
LastPro = Prolog;

2
llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
View File

@ -1446,7 +1446,7 @@ void FastISel::fastEmitBranch(MachineBasicBlock *MSucc,
// fall-through case, which needs no instructions.
} else {
// The unconditional branch case.
TII.InsertBranch(*FuncInfo.MBB, MSucc, nullptr,
TII.insertBranch(*FuncInfo.MBB, MSucc, nullptr,
SmallVector<MachineOperand, 0>(), DbgLoc);
}
if (FuncInfo.BPI) {

2
llvm/lib/CodeGen/TailDuplicator.cpp
View File

@ -726,7 +726,7 @@ bool TailDuplicator::duplicateSimpleBB(
}
if (PredTBB)
TII->InsertBranch(*PredBB, PredTBB, PredFBB, PredCond, DebugLoc());
TII->insertBranch(*PredBB, PredTBB, PredFBB, PredCond, DebugLoc());
TDBBs.push_back(PredBB);
}

2
llvm/lib/CodeGen/TargetInstrInfo.cpp
View File

@ -119,7 +119,7 @@ TargetInstrInfo::ReplaceTailWithBranchTo(MachineBasicBlock::iterator Tail,
// If MBB isn't immediately before MBB, insert a branch to it.
if (++MachineFunction::iterator(MBB) != MachineFunction::iterator(NewDest))
InsertBranch(*MBB, NewDest, nullptr, SmallVector<MachineOperand, 0>(), DL);
insertBranch(*MBB, NewDest, nullptr, SmallVector<MachineOperand, 0>(), DL);
MBB->addSuccessor(NewDest);
}

4
llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp
View File

@ -303,7 +303,7 @@ bool AArch64BranchRelaxation::fixupConditionalBranch(MachineInstr &MI) {
TII->ReverseBranchCondition(Cond);
int OldSize = 0, NewSize = 0;
TII->RemoveBranch(*MBB, &OldSize);
TII->InsertBranch(*MBB, FBB, TBB, Cond, DL, &NewSize);
TII->insertBranch(*MBB, FBB, TBB, Cond, DL, &NewSize);
BlockInfo[MBB->getNumber()].Size += (NewSize - OldSize);
return true;
@ -345,7 +345,7 @@ bool AArch64BranchRelaxation::fixupConditionalBranch(MachineInstr &MI) {
MBBSize -= RemovedSize;
int AddedSize = 0;
TII->InsertBranch(*MBB, &NextBB, TBB, Cond, DL, &AddedSize);
TII->insertBranch(*MBB, &NextBB, TBB, Cond, DL, &AddedSize);
MBBSize += AddedSize;
// Finally, keep the block offsets up to date.

4
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
View File

@ -350,14 +350,14 @@ void AArch64InstrInfo::instantiateCondBranch(
}
}
unsigned AArch64InstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned AArch64InstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
if (!FBB) {
if (Cond.empty()) // Unconditional branch?

2
llvm/lib/Target/AArch64/AArch64InstrInfo.h
View File

@ -185,7 +185,7 @@ public:
bool AllowModify = false) const override;
unsigned RemoveBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

4
llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
View File

@ -731,13 +731,13 @@ MachineBasicBlock::iterator FindLastAluClause(MachineBasicBlock &MBB) {
return MBB.end();
}
unsigned R600InstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned R600InstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded) const {
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
assert(!BytesAdded && "code size not handled");
if (!FBB) {

2
llvm/lib/Target/AMDGPU/R600InstrInfo.h
View File

@ -167,7 +167,7 @@ public:
SmallVectorImpl<MachineOperand> &Cond,
bool AllowModify) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

2
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
View File

@ -1125,7 +1125,7 @@ unsigned SIInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
return Count;
}
unsigned SIInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned SIInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,

2
llvm/lib/Target/AMDGPU/SIInstrInfo.h
View File

@ -166,7 +166,7 @@ public:
unsigned RemoveBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

4
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
View File

@ -409,7 +409,7 @@ unsigned ARMBaseInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
return 2;
}
unsigned ARMBaseInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned ARMBaseInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
@ -424,7 +424,7 @@ unsigned ARMBaseInstrInfo::InsertBranch(MachineBasicBlock &MBB,
bool isThumb = AFI->isThumbFunction() || AFI->isThumb2Function();
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 2 || Cond.size() == 0) &&
"ARM branch conditions have two components!");

2
llvm/lib/Target/ARM/ARMBaseInstrInfo.h
View File

@ -126,7 +126,7 @@ public:
bool AllowModify = false) const override;
unsigned RemoveBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

4
llvm/lib/Target/AVR/AVRInstrInfo.cpp
View File

@ -373,7 +373,7 @@ bool AVRInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
return false;
}
unsigned AVRInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned AVRInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
@ -382,7 +382,7 @@ unsigned AVRInstrInfo::InsertBranch(MachineBasicBlock &MBB,
assert(!BytesAdded && "code size not handled");
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 1 || Cond.size() == 0) &&
"AVR branch conditions have one component!");

2
llvm/lib/Target/AVR/AVRInstrInfo.h
View File

@ -94,7 +94,7 @@ public:
MachineBasicBlock *&FBB,
SmallVectorImpl<MachineOperand> &Cond,
bool AllowModify = false) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

4
llvm/lib/Target/BPF/BPFInstrInfo.cpp
View File

@ -130,7 +130,7 @@ bool BPFInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
return false;
}
unsigned BPFInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned BPFInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
@ -139,7 +139,7 @@ unsigned BPFInstrInfo::InsertBranch(MachineBasicBlock &MBB,
assert(!BytesAdded && "code size not handled");
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
if (Cond.empty()) {
// Unconditional branch

2
llvm/lib/Target/BPF/BPFInstrInfo.h
View File

@ -51,7 +51,7 @@ public:
unsigned RemoveBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

8
llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
View File

@ -1246,7 +1246,7 @@ bool HexagonHardwareLoops::convertToHardwareLoop(MachineLoop *L,
if (LastI != LastMBB->end())
LastI = LastMBB->erase(LastI);
SmallVector<MachineOperand, 0> Cond;
TII->InsertBranch(*LastMBB, BranchTarget, nullptr, Cond, LastIDL);
TII->insertBranch(*LastMBB, BranchTarget, nullptr, Cond, LastIDL);
}
} else {
// Conditional branch to loop start; just delete it.
@ -1923,7 +1923,7 @@ MachineBasicBlock *HexagonHardwareLoops::createPreheaderForLoop(
(void)NotAnalyzed; // suppress compiler warning
assert (!NotAnalyzed && "Should be analyzable!");
if (TB != Header && (Tmp2.empty() || FB != Header))
TII->InsertBranch(*PB, NewPH, nullptr, EmptyCond, DL);
TII->insertBranch(*PB, NewPH, nullptr, EmptyCond, DL);
PB->ReplaceUsesOfBlockWith(Header, NewPH);
}
}
@ -1935,10 +1935,10 @@ MachineBasicBlock *HexagonHardwareLoops::createPreheaderForLoop(
(void)LatchNotAnalyzed; // suppress compiler warning
assert (!LatchNotAnalyzed && "Should be analyzable!");
if (!TB && !FB)
TII->InsertBranch(*Latch, Header, nullptr, EmptyCond, DL);
TII->insertBranch(*Latch, Header, nullptr, EmptyCond, DL);
// Finally, the branch from the preheader to the header.
TII->InsertBranch(*NewPH, Header, nullptr, EmptyCond, DL);
TII->insertBranch(*NewPH, Header, nullptr, EmptyCond, DL);
NewPH->addSuccessor(Header);
MachineLoop *ParentLoop = L->getParentLoop();

6
llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
View File

@ -560,7 +560,7 @@ unsigned HexagonInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
return Count;
}
unsigned HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned HexagonInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
@ -569,7 +569,7 @@ unsigned HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned BOpc = Hexagon::J2_jump;
unsigned BccOpc = Hexagon::J2_jumpt;
assert(validateBranchCond(Cond) && "Invalid branching condition");
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
assert(!BytesAdded && "code size not handled");
// Check if ReverseBranchCondition has asked to reverse this branch
@ -592,7 +592,7 @@ unsigned HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB,
MachineFunction::iterator(NewTBB) == ++MBB.getIterator()) {
ReverseBranchCondition(Cond);
RemoveBranch(MBB);
return InsertBranch(MBB, TBB, nullptr, Cond, DL);
return insertBranch(MBB, TBB, nullptr, Cond, DL);
}
BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB);
} else if (isEndLoopN(Cond[0].getImm())) {

4
llvm/lib/Target/Hexagon/HexagonInstrInfo.h
View File

@ -73,7 +73,7 @@ public:
/// condition. These operands can be passed to other TargetInstrInfo
/// methods to create new branches.
///
/// Note that RemoveBranch and InsertBranch must be implemented to support
/// Note that RemoveBranch and insertBranch must be implemented to support
/// cases where this method returns success.
///
/// If AllowModify is true, then this routine is allowed to modify the basic
@ -100,7 +100,7 @@ public:
/// cases where AnalyzeBranch doesn't apply because there was no original
/// branch to analyze. At least this much must be implemented, else tail
/// merging needs to be disabled.
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

6
llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
View File

@ -558,7 +558,7 @@ LanaiInstrInfo::optimizeSelect(MachineInstr &MI,
// - FalseBlock is set to the destination if condition evaluates to false (it
// is the nullptr if the branch is unconditional);
// - condition is populated with machine operands needed to generate the branch
// to insert in InsertBranch;
// to insert in insertBranch;
// Returns: false if branch could successfully be analyzed.
bool LanaiInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
MachineBasicBlock *&TrueBlock,
@ -658,14 +658,14 @@ bool LanaiInstrInfo::ReverseBranchCondition(
// Insert the branch with condition specified in condition and given targets
// (TrueBlock and FalseBlock). This function returns the number of machine
// instructions inserted.
unsigned LanaiInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned LanaiInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TrueBlock,
MachineBasicBlock *FalseBlock,
ArrayRef<MachineOperand> Condition,
const DebugLoc &DL,
int *BytesAdded) const {
// Shouldn't be a fall through.
assert(TrueBlock && "InsertBranch must not be told to insert a fallthrough");
assert(TrueBlock && "insertBranch must not be told to insert a fallthrough");
assert(!BytesAdded && "code size not handled");
// If condition is empty then an unconditional branch is being inserted.

2
llvm/lib/Target/Lanai/LanaiInstrInfo.h
View File

@ -133,7 +133,7 @@ public:
bool ReverseBranchCondition(
SmallVectorImpl<MachineOperand> &Condition) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TrueBlock,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TrueBlock,
MachineBasicBlock *FalseBlock,
ArrayRef<MachineOperand> Condition,
const DebugLoc &DL,

4
llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
View File

@ -263,14 +263,14 @@ bool MSP430InstrInfo::analyzeBranch(MachineBasicBlock &MBB,
return false;
}
unsigned MSP430InstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned MSP430InstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 1 || Cond.size() == 0) &&
"MSP430 branch conditions have one component!");
assert(!BytesAdded && "code size not handled");

2
llvm/lib/Target/MSP430/MSP430InstrInfo.h
View File

@ -81,7 +81,7 @@ public:
unsigned RemoveBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

4
llvm/lib/Target/Mips/MipsInstrInfo.cpp
View File

@ -113,14 +113,14 @@ void MipsInstrInfo::BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MIB.addMBB(TBB);
}
unsigned MipsInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned MipsInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
assert(!BytesAdded && "code size not handled");
// # of condition operands:

2
llvm/lib/Target/Mips/MipsInstrInfo.h
View File

@ -58,7 +58,7 @@ public:
unsigned RemoveBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

6
llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
View File

@ -143,7 +143,7 @@ bool NVPTXInstrInfo::CanTailMerge(const MachineInstr *MI) const {
/// operands can be passed to other TargetInstrInfo methods to create new
/// branches.
///
/// Note that RemoveBranch and InsertBranch must be implemented to support
/// Note that RemoveBranch and insertBranch must be implemented to support
/// cases where this method returns success.
///
bool NVPTXInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
@ -231,7 +231,7 @@ unsigned NVPTXInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
return 2;
}
unsigned NVPTXInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned NVPTXInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
@ -240,7 +240,7 @@ unsigned NVPTXInstrInfo::InsertBranch(MachineBasicBlock &MBB,
assert(!BytesAdded && "code size not handled");
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 1 || Cond.size() == 0) &&
"NVPTX branch conditions have two components!");

2
llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
View File

@ -65,7 +65,7 @@ public:
bool AllowModify) const override;
unsigned RemoveBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

4
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
View File

@ -637,14 +637,14 @@ unsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
return 2;
}
unsigned PPCInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned PPCInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 2 || Cond.size() == 0) &&
"PPC branch conditions have two components!");
assert(!BytesAdded && "code size not handled");

2
llvm/lib/Target/PowerPC/PPCInstrInfo.h
View File

@ -170,7 +170,7 @@ public:
bool AllowModify) const override;
unsigned RemoveBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

4
llvm/lib/Target/Sparc/SparcInstrInfo.cpp
View File

@ -240,13 +240,13 @@ bool SparcInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
return true;
}
unsigned SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned SparcInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded) const {
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 1 || Cond.size() == 0) &&
"Sparc branch conditions should have one component!");
assert(!BytesAdded && "code size not handled");

2
llvm/lib/Target/Sparc/SparcInstrInfo.h
View File

@ -73,7 +73,7 @@ public:
unsigned RemoveBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

4
llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
View File

@ -395,7 +395,7 @@ ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
return false;
}
unsigned SystemZInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned SystemZInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
@ -406,7 +406,7 @@ unsigned SystemZInstrInfo::InsertBranch(MachineBasicBlock &MBB,
// in the pipeline, if desired.
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 2 || Cond.size() == 0) &&
"SystemZ branch conditions have one component!");
assert(!BytesAdded && "code size not handled");

2
llvm/lib/Target/SystemZ/SystemZInstrInfo.h
View File

@ -166,7 +166,7 @@ public:
bool AllowModify) const override;
unsigned RemoveBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

2
llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
View File

@ -164,7 +164,7 @@ unsigned WebAssemblyInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
return Count;
}
unsigned WebAssemblyInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned WebAssemblyInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,

2
llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h
View File

@ -50,7 +50,7 @@ public:
bool AllowModify = false) const override;
unsigned RemoveBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

4
llvm/lib/Target/X86/X86InstrInfo.cpp
View File

@ -4464,14 +4464,14 @@ unsigned X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB,
return Count;
}
unsigned X86InstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned X86InstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 1 || Cond.size() == 0) &&
"X86 branch conditions have one component!");
assert(!BytesAdded && "code size not handled");

2
llvm/lib/Target/X86/X86InstrInfo.h
View File

@ -337,7 +337,7 @@ public:
unsigned RemoveBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;

6
llvm/lib/Target/XCore/XCoreInstrInfo.cpp
View File

@ -184,7 +184,7 @@ static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC)
/// operands can be passed to other TargetInstrInfo methods to create new
/// branches.
///
/// Note that RemoveBranch and InsertBranch must be implemented to support
/// Note that RemoveBranch and insertBranch must be implemented to support
/// cases where this method returns success.
///
bool XCoreInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
@ -269,14 +269,14 @@ bool XCoreInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
return true;
}
unsigned XCoreInstrInfo::InsertBranch(MachineBasicBlock &MBB,
unsigned XCoreInstrInfo::insertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert(TBB && "insertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 2 || Cond.size() == 0) &&
"Unexpected number of components!");
assert(!BytesAdded && "code size not handled");

2
llvm/lib/Target/XCore/XCoreInstrInfo.h
View File

@ -55,7 +55,7 @@ public:
SmallVectorImpl<MachineOperand> &Cond,
bool AllowModify) const override;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;