[InstCombine] improve demanded vector elements analysis of insertelement
Recurse instead of returning on the first found optimization. Also, return early in the caller instead of continuing because that allows another round of simplification before we might potentially lose undef information from a shuffle mask by eliminating the shuffle. As noted in the review, we could probably do better and be more efficient by moving all of demanded elements into a separate pass, but this is yet another quick fix to instcombine. Differential Revision: https://reviews.llvm.org/D37236 llvm-svn: 312248
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@ -993,22 +993,23 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
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break;
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}
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// The element inserted overwrites whatever was there, so the input demanded
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// set is simpler than the output set.
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unsigned IdxNo = Idx->getZExtValue();
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APInt PreInsertDemandedElts = DemandedElts;
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if (IdxNo < VWidth)
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PreInsertDemandedElts.clearBit(IdxNo);
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TmpV = SimplifyDemandedVectorElts(I->getOperand(0), PreInsertDemandedElts,
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UndefElts, Depth + 1);
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if (TmpV) { I->setOperand(0, TmpV); MadeChange = true; }
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// If this is inserting an element that isn't demanded, remove this
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// insertelement.
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unsigned IdxNo = Idx->getZExtValue();
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if (IdxNo >= VWidth || !DemandedElts[IdxNo]) {
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Worklist.Add(I);
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return I->getOperand(0);
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}
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// Otherwise, the element inserted overwrites whatever was there, so the
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// input demanded set is simpler than the output set.
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APInt DemandedElts2 = DemandedElts;
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DemandedElts2.clearBit(IdxNo);
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TmpV = SimplifyDemandedVectorElts(I->getOperand(0), DemandedElts2,
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UndefElts, Depth + 1);
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if (TmpV) { I->setOperand(0, TmpV); MadeChange = true; }
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// The inserted element is defined.
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UndefElts.clearBit(IdxNo);
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break;
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@ -1165,9 +1165,7 @@ Instruction *InstCombiner::visitShuffleVectorInst(ShuffleVectorInst &SVI) {
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if (Value *V = SimplifyDemandedVectorElts(&SVI, AllOnesEltMask, UndefElts)) {
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if (V != &SVI)
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return replaceInstUsesWith(SVI, V);
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LHS = SVI.getOperand(0);
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RHS = SVI.getOperand(1);
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MadeChange = true;
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return &SVI;
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}
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unsigned LHSWidth = LHS->getType()->getVectorNumElements();
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@ -485,9 +485,8 @@ define <16 x i8> @demanded_elts_insertion(<16 x i8> %InVec, <16 x i8> %BaseMask,
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define <32 x i8> @demanded_elts_insertion_avx2(<32 x i8> %InVec, <32 x i8> %BaseMask, i8 %M0, i8 %M22) {
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; CHECK-LABEL: @demanded_elts_insertion_avx2(
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <32 x i8> %BaseMask, i8 %M0, i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> [[TMP1]])
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; CHECK-NEXT: ret <32 x i8> [[TMP2]]
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; CHECK-NEXT: [[TMP1:%.*]] = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> %BaseMask)
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; CHECK-NEXT: ret <32 x i8> [[TMP1]]
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;
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%1 = insertelement <32 x i8> %BaseMask, i8 %M0, i32 0
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%2 = insertelement <32 x i8> %1, i8 %M22, i32 22
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@ -142,13 +142,11 @@ define <2 x i64> @PR24922(<2 x i64> %v) {
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ret <2 x i64> %result
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}
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; FIXME: The shuffle only demands the 0th (undef) element of 'out123', so everything should fold away.
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; The shuffle only demands the 0th (undef) element of 'out123', so everything should fold away.
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define <4 x float> @inselt_shuf_no_demand(float %a1, float %a2, float %a3) {
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; CHECK-LABEL: @inselt_shuf_no_demand(
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; CHECK-NEXT: [[OUT1:%.*]] = insertelement <4 x float> undef, float %a1, i32 1
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; CHECK-NEXT: [[OUT12:%.*]] = insertelement <4 x float> [[OUT1]], float %a2, i32 2
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; CHECK-NEXT: ret <4 x float> [[OUT12]]
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; CHECK-NEXT: ret <4 x float> undef
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;
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%out1 = insertelement <4 x float> undef, float %a1, i32 1
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%out12 = insertelement <4 x float> %out1, float %a2, i32 2
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@ -157,13 +155,11 @@ define <4 x float> @inselt_shuf_no_demand(float %a1, float %a2, float %a3) {
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ret <4 x float> %shuffle
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}
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; FIXME: The shuffle only demands the 0th (undef) element of 'out123', so everything should fold away.
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; The shuffle only demands the 0th (undef) element of 'out123', so everything should fold away.
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define <4 x float> @inselt_shuf_no_demand_commute(float %a1, float %a2, float %a3) {
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; CHECK-LABEL: @inselt_shuf_no_demand_commute(
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; CHECK-NEXT: [[OUT1:%.*]] = insertelement <4 x float> undef, float %a1, i32 1
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; CHECK-NEXT: [[OUT12:%.*]] = insertelement <4 x float> [[OUT1]], float %a2, i32 2
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; CHECK-NEXT: ret <4 x float> [[OUT12]]
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; CHECK-NEXT: ret <4 x float> undef
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;
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%out1 = insertelement <4 x float> undef, float %a1, i32 1
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%out12 = insertelement <4 x float> %out1, float %a2, i32 2
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@ -172,15 +168,14 @@ define <4 x float> @inselt_shuf_no_demand_commute(float %a1, float %a2, float %a
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ret <4 x float> %shuffle
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}
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; FIXME: The add uses 'out012' giving it multiple uses after the shuffle is transformed to also
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; The add uses 'out012' giving it multiple uses after the shuffle is transformed to also
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; use 'out012'. The analysis should be able to see past that.
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define <4 x i32> @inselt_shuf_no_demand_multiuse(i32 %a0, i32 %a1, <4 x i32> %b) {
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; CHECK-LABEL: @inselt_shuf_no_demand_multiuse(
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; CHECK-NEXT: [[OUT0:%.*]] = insertelement <4 x i32> undef, i32 %a0, i32 0
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; CHECK-NEXT: [[OUT01:%.*]] = insertelement <4 x i32> [[OUT0]], i32 %a1, i32 1
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; CHECK-NEXT: [[OUT012:%.*]] = insertelement <4 x i32> [[OUT01]], i32 %a0, i32 2
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; CHECK-NEXT: [[FOO:%.*]] = add <4 x i32> [[OUT012]], %b
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; CHECK-NEXT: [[FOO:%.*]] = add <4 x i32> [[OUT01]], %b
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; CHECK-NEXT: ret <4 x i32> [[FOO]]
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;
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%out0 = insertelement <4 x i32> undef, i32 %a0, i32 0
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