From e633741c3a358f04632d57a1454f1287e66dd568 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Tue, 6 Dec 2016 13:29:55 +0000 Subject: [PATCH] [SLPVectorizer][X86] Tests to show missed buildvector sitofp/fptosi vectorizations e.g. buildvector(sitofp(i32), sitofp(i32), sitofp(i32), sitofp(i32)) --> sitofp(buildvector(i32, i32, i32, i32)) llvm-svn: 288807 --- .../Transforms/SLPVectorizer/X86/fptosi.ll | 50 +++++++++++++++++++ .../Transforms/SLPVectorizer/X86/sitofp.ll | 50 +++++++++++++++++++ 2 files changed, 100 insertions(+) diff --git a/llvm/test/Transforms/SLPVectorizer/X86/fptosi.ll b/llvm/test/Transforms/SLPVectorizer/X86/fptosi.ll index a06a13ef90d8..9e95416b4cc4 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/fptosi.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/fptosi.ll @@ -489,4 +489,54 @@ define void @fptosi_8f32_8i8() #0 { ret void } +; +; FPTOSI BUILDVECTOR +; + +define <4 x i32> @fptosi_4xf64_4i32(double %a0, double %a1, double %a2, double %a3) #0 { +; CHECK-LABEL: @fptosi_4xf64_4i32( +; CHECK-NEXT: [[CVT0:%.*]] = fptosi double %a0 to i32 +; CHECK-NEXT: [[CVT1:%.*]] = fptosi double %a1 to i32 +; CHECK-NEXT: [[CVT2:%.*]] = fptosi double %a2 to i32 +; CHECK-NEXT: [[CVT3:%.*]] = fptosi double %a3 to i32 +; CHECK-NEXT: [[RES0:%.*]] = insertelement <4 x i32> undef, i32 [[CVT0]], i32 0 +; CHECK-NEXT: [[RES1:%.*]] = insertelement <4 x i32> [[RES0]], i32 [[CVT1]], i32 1 +; CHECK-NEXT: [[RES2:%.*]] = insertelement <4 x i32> [[RES1]], i32 [[CVT2]], i32 2 +; CHECK-NEXT: [[RES3:%.*]] = insertelement <4 x i32> [[RES2]], i32 [[CVT3]], i32 3 +; CHECK-NEXT: ret <4 x i32> [[RES3]] +; + %cvt0 = fptosi double %a0 to i32 + %cvt1 = fptosi double %a1 to i32 + %cvt2 = fptosi double %a2 to i32 + %cvt3 = fptosi double %a3 to i32 + %res0 = insertelement <4 x i32> undef, i32 %cvt0, i32 0 + %res1 = insertelement <4 x i32> %res0, i32 %cvt1, i32 1 + %res2 = insertelement <4 x i32> %res1, i32 %cvt2, i32 2 + %res3 = insertelement <4 x i32> %res2, i32 %cvt3, i32 3 + ret <4 x i32> %res3 +} + +define <4 x i32> @fptosi_4xf32_4i32(float %a0, float %a1, float %a2, float %a3) #0 { +; CHECK-LABEL: @fptosi_4xf32_4i32( +; CHECK-NEXT: [[CVT0:%.*]] = fptosi float %a0 to i32 +; CHECK-NEXT: [[CVT1:%.*]] = fptosi float %a1 to i32 +; CHECK-NEXT: [[CVT2:%.*]] = fptosi float %a2 to i32 +; CHECK-NEXT: [[CVT3:%.*]] = fptosi float %a3 to i32 +; CHECK-NEXT: [[RES0:%.*]] = insertelement <4 x i32> undef, i32 [[CVT0]], i32 0 +; CHECK-NEXT: [[RES1:%.*]] = insertelement <4 x i32> [[RES0]], i32 [[CVT1]], i32 1 +; CHECK-NEXT: [[RES2:%.*]] = insertelement <4 x i32> [[RES1]], i32 [[CVT2]], i32 2 +; CHECK-NEXT: [[RES3:%.*]] = insertelement <4 x i32> [[RES2]], i32 [[CVT3]], i32 3 +; CHECK-NEXT: ret <4 x i32> [[RES3]] +; + %cvt0 = fptosi float %a0 to i32 + %cvt1 = fptosi float %a1 to i32 + %cvt2 = fptosi float %a2 to i32 + %cvt3 = fptosi float %a3 to i32 + %res0 = insertelement <4 x i32> undef, i32 %cvt0, i32 0 + %res1 = insertelement <4 x i32> %res0, i32 %cvt1, i32 1 + %res2 = insertelement <4 x i32> %res1, i32 %cvt2, i32 2 + %res3 = insertelement <4 x i32> %res2, i32 %cvt3, i32 3 + ret <4 x i32> %res3 +} + attributes #0 = { nounwind } diff --git a/llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll b/llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll index 6e91a2181ccd..3b0d33877840 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll @@ -1175,4 +1175,54 @@ define void @sitofp_16i8_16f32() #0 { ret void } +; +; SITOFP BUILDVECTOR +; + +define <4 x double> @sitofp_4xi32_4f64(i32 %a0, i32 %a1, i32 %a2, i32 %a3) #0 { +; CHECK-LABEL: @sitofp_4xi32_4f64( +; CHECK-NEXT: [[CVT0:%.*]] = sitofp i32 %a0 to double +; CHECK-NEXT: [[CVT1:%.*]] = sitofp i32 %a1 to double +; CHECK-NEXT: [[CVT2:%.*]] = sitofp i32 %a2 to double +; CHECK-NEXT: [[CVT3:%.*]] = sitofp i32 %a3 to double +; CHECK-NEXT: [[RES0:%.*]] = insertelement <4 x double> undef, double [[CVT0]], i32 0 +; CHECK-NEXT: [[RES1:%.*]] = insertelement <4 x double> [[RES0]], double [[CVT1]], i32 1 +; CHECK-NEXT: [[RES2:%.*]] = insertelement <4 x double> [[RES1]], double [[CVT2]], i32 2 +; CHECK-NEXT: [[RES3:%.*]] = insertelement <4 x double> [[RES2]], double [[CVT3]], i32 3 +; CHECK-NEXT: ret <4 x double> [[RES3]] +; + %cvt0 = sitofp i32 %a0 to double + %cvt1 = sitofp i32 %a1 to double + %cvt2 = sitofp i32 %a2 to double + %cvt3 = sitofp i32 %a3 to double + %res0 = insertelement <4 x double> undef, double %cvt0, i32 0 + %res1 = insertelement <4 x double> %res0, double %cvt1, i32 1 + %res2 = insertelement <4 x double> %res1, double %cvt2, i32 2 + %res3 = insertelement <4 x double> %res2, double %cvt3, i32 3 + ret <4 x double> %res3 +} + +define <4 x float> @sitofp_4xi32_4f32(i32 %a0, i32 %a1, i32 %a2, i32 %a3) #0 { +; CHECK-LABEL: @sitofp_4xi32_4f32( +; CHECK-NEXT: [[CVT0:%.*]] = sitofp i32 %a0 to float +; CHECK-NEXT: [[CVT1:%.*]] = sitofp i32 %a1 to float +; CHECK-NEXT: [[CVT2:%.*]] = sitofp i32 %a2 to float +; CHECK-NEXT: [[CVT3:%.*]] = sitofp i32 %a3 to float +; CHECK-NEXT: [[RES0:%.*]] = insertelement <4 x float> undef, float [[CVT0]], i32 0 +; CHECK-NEXT: [[RES1:%.*]] = insertelement <4 x float> [[RES0]], float [[CVT1]], i32 1 +; CHECK-NEXT: [[RES2:%.*]] = insertelement <4 x float> [[RES1]], float [[CVT2]], i32 2 +; CHECK-NEXT: [[RES3:%.*]] = insertelement <4 x float> [[RES2]], float [[CVT3]], i32 3 +; CHECK-NEXT: ret <4 x float> [[RES3]] +; + %cvt0 = sitofp i32 %a0 to float + %cvt1 = sitofp i32 %a1 to float + %cvt2 = sitofp i32 %a2 to float + %cvt3 = sitofp i32 %a3 to float + %res0 = insertelement <4 x float> undef, float %cvt0, i32 0 + %res1 = insertelement <4 x float> %res0, float %cvt1, i32 1 + %res2 = insertelement <4 x float> %res1, float %cvt2, i32 2 + %res3 = insertelement <4 x float> %res2, float %cvt3, i32 3 + ret <4 x float> %res3 +} + attributes #0 = { nounwind }