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[RegAllocFast] Properly track the physical register definitions on calls. 

PR26485

llvm-svn: 261384
This commit is contained in:
Quentin Colombet 2016-02-20 00:32:29 +00:00
parent 3dfec7580b
commit e611698e84
3 changed files with 35 additions and 5 deletions
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10
llvm/lib/CodeGen/RegAllocFast.cpp
View File

@ -1002,11 +1002,13 @@ void RAFast::AllocateBasicBlock() {
unsigned DefOpEnd = MI->getNumOperands();
if (MI->isCall()) {
// Spill all virtregs before a call. This serves two purposes: 1. If an
// Spill all virtregs before a call. This serves one purpose: If an
// exception is thrown, the landing pad is going to expect to find
// registers in their spill slots, and 2. we don't have to wade through
// all the <imp-def> operands on the call instruction.
DefOpEnd = VirtOpEnd;
// registers in their spill slots.
// Note: although this is appealing to just consider all definitions
// as call-clobbered, this is not correct because some of those
// definitions may be used later on and we do not want to reuse
// those for virtual registers in between.
DEBUG(dbgs() << " Spilling remaining registers before call.\n");
spillAll(MI);

4
llvm/test/CodeGen/ARM/Windows/alloca.ll
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@ -13,7 +13,9 @@ entry:
}
; CHECK: bl num_entries
; CHECK: movs [[R1:r[0-9]+]], #7
; Any register is actually valid here, but turns out we use lr,
; because we do not have the kill flag on R0.
; CHECK: mov.w [[R1:lr]], #7
; CHECK: add.w [[R0:r[0-9]+]], [[R1]], [[R0]], lsl #2
; CHECK: bic [[R0]], [[R0]], #7
; CHECK: lsrs r4, [[R0]], #2

26
llvm/test/CodeGen/X86/i386-tlscall-fastregalloc.ll Normal file
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@ -0,0 +1,26 @@
; RUN: llc %s -o - -O0 -regalloc=fast | FileCheck %s
target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
target triple = "i386-apple-macosx10.10"
@c = external global i8, align 1
@p = thread_local global i8* null, align 4
; Check that regalloc fast correctly preserves EAX that is set by the TLS call
; until the actual use.
; PR26485.
;
; CHECK-LABEL: f:
; Get p.
; CHECK: movl _p@{{[0-9a-zA-Z]+}}, [[P_ADDR:%[a-z]+]]
; CHECK-NEXT: calll *([[P_ADDR]])
; At this point eax contiains the address of p.
; Load c address.
; Make sure we do not clobber eax.
; CHECK-NEXT: movl L_c{{[^,]*}}, [[C_ADDR:%e[b-z]x+]]
; Store c address into p.
; CHECK-NEXT: movl [[C_ADDR]], (%eax)
define void @f() #0 {
entry:
store i8* @c, i8** @p, align 4
ret void
}