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[Hexagon] Fix compiler warnings in release build 

Patch by Aditya Nandakumar.

llvm-svn: 235635
This commit is contained in:
Krzysztof Parzyszek 2015-04-23 20:26:21 +00:00
parent e2b885c4bc
commit e568967986
2 changed files with 6 additions and 1 deletions
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2
llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
View File

@ -170,6 +170,8 @@ static bool areCombinableOperations(const TargetRegisterInfo *TRI,
MachineInstr *LowRegInst) {
unsigned HiOpc = HighRegInst->getOpcode();
unsigned LoOpc = LowRegInst->getOpcode();
(void)HiOpc; // Fix compiler warning
(void)LoOpc; // Fix compiler warning
assert((HiOpc == Hexagon::A2_tfr || HiOpc == Hexagon::A2_tfrsi) &&
(LoOpc == Hexagon::A2_tfr || LoOpc == Hexagon::A2_tfrsi) &&
"Assume individual instructions are of a combinable type");

5
llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
View File

@ -580,6 +580,7 @@ void HexagonFrameLowering::insertEpilogueInBlock(MachineBasicBlock &MBB) const {
// Handle EH_RETURN.
if (RetOpc == Hexagon::EH_RETURN_JMPR) {
MachineOperand &OffsetReg = RetI->getOperand(0);
(void)OffsetReg; // Silence compiler warning.
assert(OffsetReg.isReg() && "Offset should be in register!");
BuildMI(MBB, InsertPt, DL, HII.get(Hexagon::L2_deallocframe));
BuildMI(MBB, InsertPt, DL, HII.get(Hexagon::A2_add), SP)
@ -818,6 +819,7 @@ void HexagonFrameLowering::eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const {
MachineInstr &MI = *I;
unsigned Opc = MI.getOpcode();
(void)Opc; // Silence compiler warning.
assert((Opc == Hexagon::ADJCALLSTACKDOWN || Opc == Hexagon::ADJCALLSTACKUP) &&
"Cannot handle this call frame pseudo instruction");
MBB.erase(I);
@ -993,7 +995,7 @@ void HexagonFrameLowering::processFunctionBeforeCalleeSavedScan(
#ifndef NDEBUG
void dump_registers(BitVector &Regs, const TargetRegisterInfo &TRI) {
static void dump_registers(BitVector &Regs, const TargetRegisterInfo &TRI) {
dbgs() << '{';
for (int x = Regs.find_first(); x >= 0; x = Regs.find_next(x)) {
unsigned R = x;
@ -1007,6 +1009,7 @@ void dump_registers(BitVector &Regs, const TargetRegisterInfo &TRI) {
bool HexagonFrameLowering::assignCalleeSavedSpillSlots(MachineFunction &MF,
const TargetRegisterInfo *TRI, std::vector<CalleeSavedInfo> &CSI) const {
const Function &F = *MF.getFunction();
(void)F; // Silence compiler warning.
DEBUG(dbgs() << LLVM_FUNCTION_NAME << " on " << F.getName() << '\n');
MachineFrameInfo *MFI = MF.getFrameInfo();
BitVector SRegs(Hexagon::NUM_TARGET_REGS);