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[RISCV] Pass MCSubtargetInfo to print methods. 

Summary:

This change allows checking for ISA extensions in print methods.

Reviewers: asb, niosHD

Reviewed By: asb, niosHD

Subscribers: llvm-commits, niosHD, asb, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal

Differential Revision: https://reviews.llvm.org/D41503

llvm-svn: 322345
This commit is contained in:
Ana Pazos 2018-01-12 02:27:00 +00:00
parent d7f96d0b91
commit e3d248361e
4 changed files with 140 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
llvm/lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp
View File

@ -17,6 +17,7 @@
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
@ -37,8 +38,8 @@ NoAliases("riscv-no-aliases",
void RISCVInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
StringRef Annot, const MCSubtargetInfo &STI) {
if (NoAliases || !printAliasInstr(MI, O))
printInstruction(MI, O);
if (NoAliases || !printAliasInstr(MI, STI, O))
printInstruction(MI, STI, O);
printAnnotation(O, Annot);
}
@ -47,6 +48,7 @@ void RISCVInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
}
void RISCVInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI,
raw_ostream &O, const char *Modifier) {
assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
const MCOperand &MO = MI->getOperand(OpNo);
@ -66,6 +68,7 @@ void RISCVInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
}
void RISCVInstPrinter::printFenceArg(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI,
raw_ostream &O) {
unsigned FenceArg = MI->getOperand(OpNo).getImm();
if ((FenceArg & RISCVFenceField::I) != 0)
@ -79,6 +82,7 @@ void RISCVInstPrinter::printFenceArg(const MCInst *MI, unsigned OpNo,
}
void RISCVInstPrinter::printFRMArg(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI,
raw_ostream &O) {
auto FRMArg =
static_cast<RISCVFPRndMode::RoundingMode>(MI->getOperand(OpNo).getImm());

19
llvm/lib/Target/RISCV/InstPrinter/RISCVInstPrinter.h
View File

@ -30,16 +30,21 @@ public:
const MCSubtargetInfo &STI) override;
void printRegName(raw_ostream &O, unsigned RegNo) const override;
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
const char *Modifier = nullptr);
void printFenceArg(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printFRMArg(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
raw_ostream &O, const char *Modifier = nullptr);
void printFenceArg(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI, raw_ostream &O);
void printFRMArg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
raw_ostream &O);
// Autogenerated by tblgen.
void printInstruction(const MCInst *MI, raw_ostream &O);
bool printAliasInstr(const MCInst *MI, raw_ostream &O);
void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
raw_ostream &O);
bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
raw_ostream &O);
void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
unsigned PrintMethodIdx, raw_ostream &O);
unsigned PrintMethodIdx,
const MCSubtargetInfo &STI, raw_ostream &O);
static const char *getRegisterName(unsigned RegNo,
unsigned AltIdx = RISCV::ABIRegAltName);
};

5
llvm/lib/Target/RISCV/RISCV.td
View File

@ -84,7 +84,12 @@ def RISCVAsmParser : AsmParser {
let AllowDuplicateRegisterNames = 1;
}
def RISCVAsmWriter : AsmWriter {
int PassSubtarget = 1;
}
def RISCV : Target {
let InstructionSet = RISCVInstrInfo;
let AssemblyParsers = [RISCVAsmParser];
let AssemblyWriters = [RISCVAsmWriter];
}

117
llvm/test/MC/RISCV/csr-aliases.s Normal file
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@ -0,0 +1,117 @@
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
# RUN: | llvm-objdump -d -mattr=+f -riscv-no-aliases - \
# RUN: | FileCheck -check-prefix=CHECK-INST %s
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
# RUN: | llvm-objdump -d -mattr=+f - \
# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
# RUN: | llvm-objdump -d -mattr=+f - \
# RUN: | FileCheck -check-prefix=CHECK-EXT-F %s
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-f < %s \
# RUN: | llvm-objdump -d -mattr=+f - \
# RUN: | FileCheck -check-prefix=CHECK-EXT-F %s
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-f < %s \
# RUN: | llvm-objdump -d -mattr=-f - \
# RUN: | FileCheck -check-prefix=CHECK-EXT-F-OFF %s
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
# RUN: | llvm-objdump -d -mattr=-f - \
# RUN: | FileCheck -check-prefix=CHECK-EXT-F-OFF %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
# RUN: | llvm-objdump -d -mattr=+f -riscv-no-aliases - \
# RUN: | FileCheck -check-prefix=CHECK-INST %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
# RUN: | llvm-objdump -d -mattr=+f - \
# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
# RUN: | llvm-objdump -d -mattr=+f - \
# RUN: | FileCheck -check-prefix=CHECK-EXT-F %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=-f < %s \
# RUN: | llvm-objdump -d -mattr=+f - \
# RUN: | FileCheck -check-prefix=CHECK-EXT-F %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=-f < %s \
# RUN: | llvm-objdump -d -mattr=-f - \
# RUN: | FileCheck -check-prefix=CHECK-EXT-F-OFF %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
# RUN: | llvm-objdump -d -mattr=-f - \
# RUN: | FileCheck -check-prefix=CHECK-EXT-F-OFF %s
# CHECK-INST: csrrs t0, 3, zero
# CHECK-ALIAS: frcsr t0
# CHECK-EXT-F: frcsr t0
# CHECK-EXT-F-OFF: csrr t0, 3
csrrs t0, 3, zero
# CHECK-INST: csrrw t1, 3, t2
# CHECK-ALIAS: fscsr t1, t2
# CHECK-EXT-F-ON: fscsr t1, t2
# CHECK-EXT-F-OFF: csrrw t1, 3, t2
csrrw t1, 3, t2
# CHECK-INST: csrrw zero, 3, t2
# CHECK-ALIAS: fscsr t2
# CHECK-EXT-F-ON: fscsr t2
# CHECK-EXT-F-OFF: csrw 3, t2
csrrw zero, 3, t2
# CHECK-INST: csrrw zero, 3, t2
# CHECK-ALIAS: fscsr t2
# CHECK-EXT-F-ON: fscsr t2
# CHECK-EXT-F-OFF: csrw 3, t2
csrrw zero, 3, t2
# CHECK-INST: csrrw t0, 2, zero
# CHECK-ALIAS: fsrm t0, zero
# CHECK-EXT-F-ON: fsrm t0, zero
# CHECK-EXT-F-OFF: csrrw t0, 2, zero
csrrw t0, 2, zero
# CHECK-INST: csrrw t0, 2, t1
# CHECK-ALIAS: fsrm t0, t1
# CHECK-EXT-F-ON: fsrm t0, t1
# CHECK-EXT-F-OFF: csrrw t0, 2, t1
csrrw t0, 2, t1
# CHECK-INST: csrrwi t0, 2, 31
# CHECK-ALIAS: fsrmi t0, 31
# CHECK-EXT-F-ON: fsrmi t0, 31
# CHECK-EXT-F-OFF: csrrwi t0, 2, 31
csrrwi t0, 2, 31
# CHECK-INST: csrrwi zero, 2, 31
# CHECK-ALIAS: fsrmi 31
# CHECK-EXT-F-ON: fsrmi 31
# CHECK-EXT-F-OFF: csrwi 2, 31
csrrwi zero, 2, 31
# CHECK-INST: csrrs t0, 1, zero
# CHECK-ALIAS: frflags t0
# CHECK-EXT-F-ON: frflags t0
# CHECK-EXT-F-OFF: csrr t0, 1
csrrs t0, 1, zero
# CHECK-INST: csrrw t0, 1, t2
# CHECK-ALIAS: fsflags t0, t2
# CHECK-EXT-F-ON: fsflags t0, t2
# CHECK-EXT-F-OFF: csrrw t0, 1, t2
csrrw t0, 1, t2
# CHECK-INST: csrrw zero, 1, t2
# CHECK-ALIAS: fsflags t2
# CHECK-EXT-F-ON: fsflags t2
# CHECK-EXT-F-OFF: csrw 1, t2
csrrw zero, 1, t2
# CHECK-INST: csrrwi t0, 1, 31
# CHECK-ALIAS: fsflagsi t0, 31
# CHECK-EXT-F: fsflagsi t0, 31
# CHECK-EXT-F-OFF: csrrwi t0, 1, 31
csrrwi t0, 1, 31
# CHECK-INST: csrrwi zero, 1, 31
# CHECK-ALIAS: fsflagsi 31
# CHECK-EXT-F: fsflagsi 31
# CHECK-EXT-F-OFF: csrwi 1, 31
csrrwi zero, 1, 31