ARM mode 'mul' operand ordering tweak.
Same as r145922, just for ARM mode. llvm-svn: 145923
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@ -5067,4 +5067,4 @@ def : ARMInstAlias<"ror${s}${p} $Rn, $Rm",
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// 'mul' instruction can be specified with only two operands.
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def : ARMInstAlias<"mul${s}${p} $Rn, $Rm",
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(MUL rGPR:$Rn, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s)>;
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(MUL rGPR:$Rn, rGPR:$Rm, rGPR:$Rn, pred:$p, cc_out:$s)>;
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@ -1013,7 +1013,6 @@ Lforward:
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@ CHECK: muls r5, r6, r7 @ encoding: [0x96,0x07,0x15,0xe0]
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@ CHECK: mulgt r5, r6, r7 @ encoding: [0x96,0x07,0x05,0xc0]
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@ CHECK: mulsle r5, r6, r7 @ encoding: [0x96,0x07,0x15,0xd0]
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@ CHECK: mul r11, r11, r5 @ encoding: [0x9b,0x05,0x0b,0xe0]
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@------------------------------------------------------------------------------
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