[X86] Split bmi.ll into a bmi test and a bmi2 test.
This moves all the bmi2 specific intrinsics to a separate test file and adds a bmi1 only command line to the existing bmi test. This will allow us to see the missed opportunity to use bextr to handle 64-bit 'and' with a large mask. This will be improved in an upcoming patch. llvm-svn: 309700
This commit is contained in:
Craig Topper
parent
810677eba2
commit
e2cc589283
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@ -1,5 +1,6 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=CHECK --check-prefix=BMI1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefix=CHECK --check-prefix=BMI2
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declare i8 @llvm.cttz.i8(i8, i1)
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declare i16 @llvm.cttz.i16(i16, i1)
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@ -382,43 +383,20 @@ entry:
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ret i64 %and
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}
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define i32 @bzhi32(i32 %x, i32 %y) {
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; CHECK-LABEL: bzhi32:
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; CHECK: # BB#0:
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; CHECK-NEXT: bzhil %esi, %edi, %eax
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; CHECK-NEXT: retq
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%tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x, i32 %y)
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ret i32 %tmp
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}
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define i32 @bzhi32_load(i32* %x, i32 %y) {
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; CHECK-LABEL: bzhi32_load:
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; CHECK: # BB#0:
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; CHECK-NEXT: bzhil %esi, (%rdi), %eax
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; CHECK-NEXT: retq
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%x1 = load i32, i32* %x
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%tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x1, i32 %y)
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ret i32 %tmp
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}
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declare i32 @llvm.x86.bmi.bzhi.32(i32, i32)
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define i64 @bzhi64(i64 %x, i64 %y) {
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; CHECK-LABEL: bzhi64:
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; CHECK: # BB#0:
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; CHECK-NEXT: bzhiq %rsi, %rdi, %rax
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; CHECK-NEXT: retq
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%tmp = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %x, i64 %y)
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ret i64 %tmp
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}
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declare i64 @llvm.x86.bmi.bzhi.64(i64, i64)
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define i32 @bzhi32b(i32 %x, i8 zeroext %index) {
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; CHECK-LABEL: bzhi32b:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: bzhil %esi, %edi, %eax
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; CHECK-NEXT: retq
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; BMI1-LABEL: bzhi32b:
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; BMI1: # BB#0: # %entry
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; BMI1-NEXT: movl $1, %eax
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; BMI1-NEXT: movl %esi, %ecx
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; BMI1-NEXT: shll %cl, %eax
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; BMI1-NEXT: decl %eax
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; BMI1-NEXT: andl %edi, %eax
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; BMI1-NEXT: retq
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;
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; BMI2-LABEL: bzhi32b:
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; BMI2: # BB#0: # %entry
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; BMI2-NEXT: bzhil %esi, %edi, %eax
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; BMI2-NEXT: retq
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entry:
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%conv = zext i8 %index to i32
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%shl = shl i32 1, %conv
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@ -428,10 +406,19 @@ entry:
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}
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define i32 @bzhi32b_load(i32* %w, i8 zeroext %index) {
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; CHECK-LABEL: bzhi32b_load:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: bzhil %esi, (%rdi), %eax
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; CHECK-NEXT: retq
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; BMI1-LABEL: bzhi32b_load:
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; BMI1: # BB#0: # %entry
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; BMI1-NEXT: movl $1, %eax
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; BMI1-NEXT: movl %esi, %ecx
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; BMI1-NEXT: shll %cl, %eax
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; BMI1-NEXT: decl %eax
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; BMI1-NEXT: andl (%rdi), %eax
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; BMI1-NEXT: retq
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;
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; BMI2-LABEL: bzhi32b_load:
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; BMI2: # BB#0: # %entry
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; BMI2-NEXT: bzhil %esi, (%rdi), %eax
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; BMI2-NEXT: retq
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entry:
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%x = load i32, i32* %w
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%conv = zext i8 %index to i32
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@ -442,10 +429,19 @@ entry:
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}
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define i32 @bzhi32c(i32 %x, i8 zeroext %index) {
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; CHECK-LABEL: bzhi32c:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: bzhil %esi, %edi, %eax
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; CHECK-NEXT: retq
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; BMI1-LABEL: bzhi32c:
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; BMI1: # BB#0: # %entry
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; BMI1-NEXT: movl $1, %eax
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; BMI1-NEXT: movl %esi, %ecx
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; BMI1-NEXT: shll %cl, %eax
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; BMI1-NEXT: decl %eax
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; BMI1-NEXT: andl %edi, %eax
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; BMI1-NEXT: retq
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;
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; BMI2-LABEL: bzhi32c:
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; BMI2: # BB#0: # %entry
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; BMI2-NEXT: bzhil %esi, %edi, %eax
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; BMI2-NEXT: retq
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entry:
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%conv = zext i8 %index to i32
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%shl = shl i32 1, %conv
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@ -455,10 +451,20 @@ entry:
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}
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define i32 @bzhi32d(i32 %a, i32 %b) {
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; CHECK-LABEL: bzhi32d:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: bzhil %esi, %edi, %eax
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; CHECK-NEXT: retq
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; BMI1-LABEL: bzhi32d:
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; BMI1: # BB#0: # %entry
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; BMI1-NEXT: movl $32, %ecx
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; BMI1-NEXT: subl %esi, %ecx
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; BMI1-NEXT: movl $-1, %eax
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; BMI1-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
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; BMI1-NEXT: shrl %cl, %eax
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; BMI1-NEXT: andl %edi, %eax
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; BMI1-NEXT: retq
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;
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; BMI2-LABEL: bzhi32d:
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; BMI2: # BB#0: # %entry
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; BMI2-NEXT: bzhil %esi, %edi, %eax
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; BMI2-NEXT: retq
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entry:
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%sub = sub i32 32, %b
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%shr = lshr i32 -1, %sub
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@ -467,10 +473,20 @@ entry:
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}
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define i32 @bzhi32e(i32 %a, i32 %b) {
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; CHECK-LABEL: bzhi32e:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: bzhil %esi, %edi, %eax
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; CHECK-NEXT: retq
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; BMI1-LABEL: bzhi32e:
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; BMI1: # BB#0: # %entry
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; BMI1-NEXT: movl $32, %ecx
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; BMI1-NEXT: subl %esi, %ecx
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; BMI1-NEXT: shll %cl, %edi
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; BMI1-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
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; BMI1-NEXT: shrl %cl, %edi
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; BMI1-NEXT: movl %edi, %eax
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; BMI1-NEXT: retq
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;
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; BMI2-LABEL: bzhi32e:
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; BMI2: # BB#0: # %entry
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; BMI2-NEXT: bzhil %esi, %edi, %eax
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; BMI2-NEXT: retq
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entry:
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%sub = sub i32 32, %b
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%shl = shl i32 %a, %sub
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@ -479,11 +495,20 @@ entry:
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}
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define i64 @bzhi64b(i64 %x, i8 zeroext %index) {
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; CHECK-LABEL: bzhi64b:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
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; CHECK-NEXT: bzhiq %rsi, %rdi, %rax
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; CHECK-NEXT: retq
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; BMI1-LABEL: bzhi64b:
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; BMI1: # BB#0: # %entry
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; BMI1-NEXT: movl $1, %eax
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; BMI1-NEXT: movl %esi, %ecx
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; BMI1-NEXT: shlq %cl, %rax
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; BMI1-NEXT: decq %rax
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; BMI1-NEXT: andq %rdi, %rax
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; BMI1-NEXT: retq
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;
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; BMI2-LABEL: bzhi64b:
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; BMI2: # BB#0: # %entry
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; BMI2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
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; BMI2-NEXT: bzhiq %rsi, %rdi, %rax
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; BMI2-NEXT: retq
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entry:
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%conv = zext i8 %index to i64
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%shl = shl i64 1, %conv
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@ -493,10 +518,20 @@ entry:
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}
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define i64 @bzhi64c(i64 %a, i64 %b) {
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; CHECK-LABEL: bzhi64c:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: bzhiq %rsi, %rdi, %rax
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; CHECK-NEXT: retq
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; BMI1-LABEL: bzhi64c:
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; BMI1: # BB#0: # %entry
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; BMI1-NEXT: movl $64, %ecx
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; BMI1-NEXT: subl %esi, %ecx
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; BMI1-NEXT: movq $-1, %rax
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; BMI1-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
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; BMI1-NEXT: shrq %cl, %rax
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; BMI1-NEXT: andq %rdi, %rax
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; BMI1-NEXT: retq
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;
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; BMI2-LABEL: bzhi64c:
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; BMI2: # BB#0: # %entry
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; BMI2-NEXT: bzhiq %rsi, %rdi, %rax
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; BMI2-NEXT: retq
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entry:
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%sub = sub i64 64, %b
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%shr = lshr i64 -1, %sub
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@ -505,11 +540,21 @@ entry:
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}
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define i64 @bzhi64d(i64 %a, i32 %b) {
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; CHECK-LABEL: bzhi64d:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
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; CHECK-NEXT: bzhiq %rsi, %rdi, %rax
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; CHECK-NEXT: retq
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; BMI1-LABEL: bzhi64d:
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; BMI1: # BB#0: # %entry
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; BMI1-NEXT: movl $64, %ecx
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; BMI1-NEXT: subl %esi, %ecx
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; BMI1-NEXT: movq $-1, %rax
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; BMI1-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
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; BMI1-NEXT: shrq %cl, %rax
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; BMI1-NEXT: andq %rdi, %rax
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; BMI1-NEXT: retq
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;
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; BMI2-LABEL: bzhi64d:
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; BMI2: # BB#0: # %entry
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; BMI2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
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; BMI2-NEXT: bzhiq %rsi, %rdi, %rax
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; BMI2-NEXT: retq
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entry:
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%sub = sub i32 64, %b
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%sh_prom = zext i32 %sub to i64
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@ -519,10 +564,20 @@ entry:
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}
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define i64 @bzhi64e(i64 %a, i64 %b) {
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; CHECK-LABEL: bzhi64e:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: bzhiq %rsi, %rdi, %rax
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; CHECK-NEXT: retq
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; BMI1-LABEL: bzhi64e:
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; BMI1: # BB#0: # %entry
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; BMI1-NEXT: movl $64, %ecx
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; BMI1-NEXT: subl %esi, %ecx
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; BMI1-NEXT: shlq %cl, %rdi
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; BMI1-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
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; BMI1-NEXT: shrq %cl, %rdi
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; BMI1-NEXT: movq %rdi, %rax
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; BMI1-NEXT: retq
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;
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; BMI2-LABEL: bzhi64e:
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; BMI2: # BB#0: # %entry
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; BMI2-NEXT: bzhiq %rsi, %rdi, %rax
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; BMI2-NEXT: retq
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entry:
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%sub = sub i64 64, %b
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%shl = shl i64 %a, %sub
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@ -531,11 +586,21 @@ entry:
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}
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define i64 @bzhi64f(i64 %a, i32 %b) {
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; CHECK-LABEL: bzhi64f:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
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; CHECK-NEXT: bzhiq %rsi, %rdi, %rax
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; CHECK-NEXT: retq
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; BMI1-LABEL: bzhi64f:
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; BMI1: # BB#0: # %entry
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; BMI1-NEXT: movl $64, %ecx
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; BMI1-NEXT: subl %esi, %ecx
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; BMI1-NEXT: shlq %cl, %rdi
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; BMI1-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
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; BMI1-NEXT: shrq %cl, %rdi
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; BMI1-NEXT: movq %rdi, %rax
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; BMI1-NEXT: retq
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;
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; BMI2-LABEL: bzhi64f:
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; BMI2: # BB#0: # %entry
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; BMI2-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
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; BMI2-NEXT: bzhiq %rsi, %rdi, %rax
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; BMI2-NEXT: retq
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entry:
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%sub = sub i32 64, %b
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%sh_prom = zext i32 %sub to i64
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@ -545,22 +610,34 @@ entry:
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}
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define i64 @bzhi64_constant_mask(i64 %x) {
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; CHECK-LABEL: bzhi64_constant_mask:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movb $62, %al
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; CHECK-NEXT: bzhiq %rax, %rdi, %rax
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; CHECK-NEXT: retq
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; BMI1-LABEL: bzhi64_constant_mask:
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; BMI1: # BB#0: # %entry
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; BMI1-NEXT: movabsq $4611686018427387903, %rax # imm = 0x3FFFFFFFFFFFFFFF
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; BMI1-NEXT: andq %rdi, %rax
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; BMI1-NEXT: retq
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;
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; BMI2-LABEL: bzhi64_constant_mask:
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; BMI2: # BB#0: # %entry
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; BMI2-NEXT: movb $62, %al
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; BMI2-NEXT: bzhiq %rax, %rdi, %rax
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; BMI2-NEXT: retq
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entry:
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%and = and i64 %x, 4611686018427387903
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ret i64 %and
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}
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define i64 @bzhi64_constant_mask_load(i64* %x) {
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; CHECK-LABEL: bzhi64_constant_mask_load:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movb $62, %al
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; CHECK-NEXT: bzhiq %rax, (%rdi), %rax
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; CHECK-NEXT: retq
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; BMI1-LABEL: bzhi64_constant_mask_load:
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; BMI1: # BB#0: # %entry
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; BMI1-NEXT: movabsq $4611686018427387903, %rax # imm = 0x3FFFFFFFFFFFFFFF
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; BMI1-NEXT: andq (%rdi), %rax
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; BMI1-NEXT: retq
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;
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; BMI2-LABEL: bzhi64_constant_mask_load:
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; BMI2: # BB#0: # %entry
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; BMI2-NEXT: movb $62, %al
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; BMI2-NEXT: bzhiq %rax, (%rdi), %rax
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; BMI2-NEXT: retq
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entry:
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%x1 = load i64, i64* %x
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%and = and i64 %x1, 4611686018427387903
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@ -671,67 +748,3 @@ define i64 @blsr64(i64 %x) {
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ret i64 %tmp2
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}
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define i32 @pdep32(i32 %x, i32 %y) {
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; CHECK-LABEL: pdep32:
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; CHECK: # BB#0:
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; CHECK-NEXT: pdepl %esi, %edi, %eax
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; CHECK-NEXT: retq
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%tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y)
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ret i32 %tmp
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}
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define i32 @pdep32_load(i32 %x, i32* %y) {
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; CHECK-LABEL: pdep32_load:
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; CHECK: # BB#0:
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; CHECK-NEXT: pdepl (%rsi), %edi, %eax
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; CHECK-NEXT: retq
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%y1 = load i32, i32* %y
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%tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y1)
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ret i32 %tmp
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}
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declare i32 @llvm.x86.bmi.pdep.32(i32, i32)
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define i64 @pdep64(i64 %x, i64 %y) {
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; CHECK-LABEL: pdep64:
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; CHECK: # BB#0:
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; CHECK-NEXT: pdepq %rsi, %rdi, %rax
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; CHECK-NEXT: retq
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%tmp = tail call i64 @llvm.x86.bmi.pdep.64(i64 %x, i64 %y)
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ret i64 %tmp
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}
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declare i64 @llvm.x86.bmi.pdep.64(i64, i64)
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define i32 @pext32(i32 %x, i32 %y) {
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; CHECK-LABEL: pext32:
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; CHECK: # BB#0:
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; CHECK-NEXT: pextl %esi, %edi, %eax
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; CHECK-NEXT: retq
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%tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y)
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ret i32 %tmp
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}
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define i32 @pext32_load(i32 %x, i32* %y) {
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; CHECK-LABEL: pext32_load:
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; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pextl (%rsi), %edi, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%y1 = load i32, i32* %y
|
||||
%tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y1)
|
||||
ret i32 %tmp
|
||||
}
|
||||
|
||||
declare i32 @llvm.x86.bmi.pext.32(i32, i32)
|
||||
|
||||
define i64 @pext64(i64 %x, i64 %y) {
|
||||
; CHECK-LABEL: pext64:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pextq %rsi, %rdi, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%tmp = tail call i64 @llvm.x86.bmi.pext.64(i64 %x, i64 %y)
|
||||
ret i64 %tmp
|
||||
}
|
||||
|
||||
declare i64 @llvm.x86.bmi.pext.64(i64, i64)
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,99 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s
|
||||
|
||||
define i32 @bzhi32(i32 %x, i32 %y) {
|
||||
; CHECK-LABEL: bzhi32:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: bzhil %esi, %edi, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x, i32 %y)
|
||||
ret i32 %tmp
|
||||
}
|
||||
|
||||
define i32 @bzhi32_load(i32* %x, i32 %y) {
|
||||
; CHECK-LABEL: bzhi32_load:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: bzhil %esi, (%rdi), %eax
|
||||
; CHECK-NEXT: retq
|
||||
%x1 = load i32, i32* %x
|
||||
%tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x1, i32 %y)
|
||||
ret i32 %tmp
|
||||
}
|
||||
|
||||
declare i32 @llvm.x86.bmi.bzhi.32(i32, i32)
|
||||
|
||||
define i64 @bzhi64(i64 %x, i64 %y) {
|
||||
; CHECK-LABEL: bzhi64:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: bzhiq %rsi, %rdi, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%tmp = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %x, i64 %y)
|
||||
ret i64 %tmp
|
||||
}
|
||||
|
||||
declare i64 @llvm.x86.bmi.bzhi.64(i64, i64)
|
||||
|
||||
define i32 @pdep32(i32 %x, i32 %y) {
|
||||
; CHECK-LABEL: pdep32:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pdepl %esi, %edi, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y)
|
||||
ret i32 %tmp
|
||||
}
|
||||
|
||||
define i32 @pdep32_load(i32 %x, i32* %y) {
|
||||
; CHECK-LABEL: pdep32_load:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pdepl (%rsi), %edi, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%y1 = load i32, i32* %y
|
||||
%tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y1)
|
||||
ret i32 %tmp
|
||||
}
|
||||
|
||||
declare i32 @llvm.x86.bmi.pdep.32(i32, i32)
|
||||
|
||||
define i64 @pdep64(i64 %x, i64 %y) {
|
||||
; CHECK-LABEL: pdep64:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pdepq %rsi, %rdi, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%tmp = tail call i64 @llvm.x86.bmi.pdep.64(i64 %x, i64 %y)
|
||||
ret i64 %tmp
|
||||
}
|
||||
|
||||
declare i64 @llvm.x86.bmi.pdep.64(i64, i64)
|
||||
|
||||
define i32 @pext32(i32 %x, i32 %y) {
|
||||
; CHECK-LABEL: pext32:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pextl %esi, %edi, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y)
|
||||
ret i32 %tmp
|
||||
}
|
||||
|
||||
define i32 @pext32_load(i32 %x, i32* %y) {
|
||||
; CHECK-LABEL: pext32_load:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pextl (%rsi), %edi, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%y1 = load i32, i32* %y
|
||||
%tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y1)
|
||||
ret i32 %tmp
|
||||
}
|
||||
|
||||
declare i32 @llvm.x86.bmi.pext.32(i32, i32)
|
||||
|
||||
define i64 @pext64(i64 %x, i64 %y) {
|
||||
; CHECK-LABEL: pext64:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pextq %rsi, %rdi, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%tmp = tail call i64 @llvm.x86.bmi.pext.64(i64 %x, i64 %y)
|
||||
ret i64 %tmp
|
||||
}
|
||||
|
||||
declare i64 @llvm.x86.bmi.pext.64(i64, i64)
|
||||
|
||||
Loading…
Reference in New Issue