[MachineCombiner] Work with itineraries

MachineCombiner predicated its use of scheduling-based metrics on
hasInstrSchedModel(), but useful conclusions can be drawn from pipeline
itineraries as well. Almost all of the logic (except for resource tracking in
preservesResourceLen) can be used if we have an itinerary, so enable it in that
case as well.

This will be used by the PowerPC backend in an upcoming commit.

llvm-svn: 242277
This commit is contained in:
Hal Finkel 2015-07-15 08:22:23 +00:00
parent 097adfb98c
commit e0fa8f2c86
2 changed files with 15 additions and 4 deletions

View File

@ -81,6 +81,12 @@ public:
return nullptr;
}
/// \brief Return true if this machine model includes an instruction-level
/// scheduling model or cycle-to-cycle itinerary data.
bool hasInstrSchedModelOrItineraries() const {
return hasInstrSchedModel() || hasInstrItineraries();
}
/// \brief Identify the processor corresponding to the current subtarget.
unsigned getProcessorID() const { return SchedModel.getProcessorID(); }

View File

@ -124,7 +124,8 @@ MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
MachineTraceMetrics::Trace BlockTrace) {
SmallVector<unsigned, 16> InstrDepth;
assert(TSchedModel.hasInstrSchedModel() && "Missing machine model\n");
assert(TSchedModel.hasInstrSchedModelOrItineraries() &&
"Missing machine model\n");
// For each instruction in the new sequence compute the depth based on the
// operands. Use the trace information when possible. For new operands which
@ -181,7 +182,8 @@ MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
unsigned MachineCombiner::getLatency(MachineInstr *Root, MachineInstr *NewRoot,
MachineTraceMetrics::Trace BlockTrace) {
assert(TSchedModel.hasInstrSchedModel() && "Missing machine model\n");
assert(TSchedModel.hasInstrSchedModelOrItineraries() &&
"Missing machine model\n");
// Check each definition in NewRoot and compute the latency
unsigned NewRootLatency = 0;
@ -228,7 +230,8 @@ bool MachineCombiner::improvesCriticalPathLen(
DenseMap<unsigned, unsigned> &InstrIdxForVirtReg,
bool NewCodeHasLessInsts) {
assert(TSchedModel.hasInstrSchedModel() && "Missing machine model\n");
assert(TSchedModel.hasInstrSchedModelOrItineraries() &&
"Missing machine model\n");
// NewRoot is the last instruction in the \p InsInstrs vector.
// Get depth and latency of NewRoot.
unsigned NewRootIdx = InsInstrs.size() - 1;
@ -276,6 +279,8 @@ bool MachineCombiner::preservesResourceLen(
MachineBasicBlock *MBB, MachineTraceMetrics::Trace BlockTrace,
SmallVectorImpl<MachineInstr *> &InsInstrs,
SmallVectorImpl<MachineInstr *> &DelInstrs) {
if (!TSchedModel.hasInstrSchedModel())
return true;
// Compute current resource length
@ -310,7 +315,7 @@ bool MachineCombiner::preservesResourceLen(
bool MachineCombiner::doSubstitute(unsigned NewSize, unsigned OldSize) {
if (OptSize && (NewSize < OldSize))
return true;
if (!TSchedModel.hasInstrSchedModel())
if (!TSchedModel.hasInstrSchedModelOrItineraries())
return true;
return false;
}