From dff5de2e44b642f789054167ae4da56b76c864c2 Mon Sep 17 00:00:00 2001 From: Tobias Grosser Date: Fri, 2 Sep 2016 23:29:38 +0000 Subject: [PATCH] Dependences: Exit early, if no reduction dependences are needed. In case we do not compute reduction dependences or dependences that are more fine-grained than statement level dependences, we can avoid the corresponding part of the dependence analysis all together. For the 3mm benchmark, this reduces scheduling + dependence analysis time from 62ms to 33ms for a no-asserts build. The majority of the compile time is anyhow spent in the LLVM backends, when doing code generation. Nevertheless, there is no need to waste compile time either. llvm-svn: 280557 --- polly/lib/Analysis/DependenceInfo.cpp | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/polly/lib/Analysis/DependenceInfo.cpp b/polly/lib/Analysis/DependenceInfo.cpp index dfd970d17d2b..91dd78893721 100644 --- a/polly/lib/Analysis/DependenceInfo.cpp +++ b/polly/lib/Analysis/DependenceInfo.cpp @@ -335,13 +335,15 @@ void Dependences::calculateDependences(Scop &S) { collectInfo(S, &Read, &Write, &MayWrite, &AccessSchedule, &StmtSchedule, Level); + bool HasReductions = !isl_union_map_is_empty(AccessSchedule); + DEBUG(dbgs() << "Read: " << Read << '\n'; dbgs() << "Write: " << Write << '\n'; dbgs() << "MayWrite: " << MayWrite << '\n'; dbgs() << "AccessSchedule: " << AccessSchedule << '\n'; dbgs() << "StmtSchedule: " << StmtSchedule << '\n';); - if (isl_union_map_is_empty(AccessSchedule)) { + if (!HasReductions) { isl_union_map_free(AccessSchedule); Schedule = S.getScheduleTree(); // Tag the schedule tree if we want fine-grain dependence info @@ -444,6 +446,15 @@ void Dependences::calculateDependences(Scop &S) { isl_ctx_reset_operations(IslCtx.get()); isl_ctx_set_max_operations(IslCtx.get(), MaxOpsOld); + // Drop out early, as the remaining computations are only needed for + // reduction dependences or dependences that are finer than statement + // level dependences. + if (!HasReductions && Level == AL_Statement) { + TC_RED = isl_union_map_empty(isl_union_map_get_space(StmtSchedule)); + isl_union_map_free(StmtSchedule); + return; + } + isl_union_map *STMT_RAW, *STMT_WAW, *STMT_WAR; STMT_RAW = isl_union_map_intersect_domain( isl_union_map_copy(RAW),