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[WebAssembly] Remove old experimental disassemler code. 

Remove support for disassembling an old experimental wasm binary format, which
is no longer in use anywhere.

llvm-svn: 294809
This commit is contained in:
Dan Gohman 2017-02-11 00:02:23 +00:00
parent 769b98d327
commit dfe6ce7abd
1 changed files with 2 additions and 84 deletions
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86
llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
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@ -63,90 +63,8 @@ extern "C" void LLVMInitializeWebAssemblyDisassembler() {
MCDisassembler::DecodeStatus WebAssemblyDisassembler::getInstruction(
MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t /*Address*/,
raw_ostream &OS, raw_ostream &CS) const {
Size = 0;
uint64_t Pos = 0;
// Read the opcode.
if (Pos + sizeof(uint64_t) > Bytes.size())
return MCDisassembler::Fail;
uint64_t Opcode = support::endian::read64le(Bytes.data() + Pos);
Pos += sizeof(uint64_t);
// TODO: Implement disassembly.
if (Opcode >= WebAssembly::INSTRUCTION_LIST_END)
return MCDisassembler::Fail;
MI.setOpcode(Opcode);
const MCInstrDesc &Desc = MCII->get(Opcode);
unsigned NumFixedOperands = Desc.NumOperands;
// If it's variadic, read the number of extra operands.
unsigned NumExtraOperands = 0;
if (Desc.isVariadic()) {
if (Pos + sizeof(uint64_t) > Bytes.size())
return MCDisassembler::Fail;
NumExtraOperands = support::endian::read64le(Bytes.data() + Pos);
Pos += sizeof(uint64_t);
}
// Read the fixed operands. These are described by the MCInstrDesc.
for (unsigned i = 0; i < NumFixedOperands; ++i) {
const MCOperandInfo &Info = Desc.OpInfo[i];
switch (Info.OperandType) {
case MCOI::OPERAND_IMMEDIATE:
case WebAssembly::OPERAND_LOCAL:
case WebAssembly::OPERAND_GLOBAL:
case WebAssembly::OPERAND_P2ALIGN:
case WebAssembly::OPERAND_BASIC_BLOCK: {
if (Pos + sizeof(uint64_t) > Bytes.size())
return MCDisassembler::Fail;
uint64_t Imm = support::endian::read64le(Bytes.data() + Pos);
Pos += sizeof(uint64_t);
MI.addOperand(MCOperand::createImm(Imm));
break;
}
case MCOI::OPERAND_REGISTER: {
if (Pos + sizeof(uint64_t) > Bytes.size())
return MCDisassembler::Fail;
uint64_t Reg = support::endian::read64le(Bytes.data() + Pos);
Pos += sizeof(uint64_t);
MI.addOperand(MCOperand::createReg(Reg));
break;
}
case WebAssembly::OPERAND_F32IMM:
case WebAssembly::OPERAND_F64IMM: {
// TODO: MC converts all floating point immediate operands to double.
// This is fine for numeric values, but may cause NaNs to change bits.
if (Pos + sizeof(uint64_t) > Bytes.size())
return MCDisassembler::Fail;
uint64_t Bits = support::endian::read64le(Bytes.data() + Pos);
Pos += sizeof(uint64_t);
double Imm;
memcpy(&Imm, &Bits, sizeof(Imm));
MI.addOperand(MCOperand::createFPImm(Imm));
break;
}
default:
llvm_unreachable("unimplemented operand kind");
}
}
// Read the extra operands.
assert(NumExtraOperands == 0 || Desc.isVariadic());
for (unsigned i = 0; i < NumExtraOperands; ++i) {
if (Pos + sizeof(uint64_t) > Bytes.size())
return MCDisassembler::Fail;
if (Desc.TSFlags & WebAssemblyII::VariableOpIsImmediate) {
// Decode extra immediate operands.
uint64_t Imm = support::endian::read64le(Bytes.data() + Pos);
MI.addOperand(MCOperand::createImm(Imm));
} else {
// Decode extra register operands.
uint64_t Reg = support::endian::read64le(Bytes.data() + Pos);
MI.addOperand(MCOperand::createReg(Reg));
}
Pos += sizeof(uint64_t);
}
Size = Pos;
return MCDisassembler::Success;
return MCDisassembler::Fail;
}