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Add handling of x86_avx2_pmovmskb to computeMaskedBitsForTargetNode for consistency. Add comments and an assert for BMI instructions to PerformXorCombine since the enabling of the combine is conditional on it, but the function itself isn't. 

llvm-svn: 147287
This commit is contained in:
Craig Topper 2011-12-27 06:27:23 +00:00
parent c554a9b58e
commit df34d152bd
1 changed files with 6 additions and 1 deletions
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7
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -12621,7 +12621,8 @@ void X86TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
case Intrinsic::x86_sse2_movmsk_pd: case Intrinsic::x86_sse2_movmsk_pd:
case Intrinsic::x86_avx_movmsk_pd_256: case Intrinsic::x86_avx_movmsk_pd_256:
case Intrinsic::x86_mmx_pmovmskb: case Intrinsic::x86_mmx_pmovmskb:
case Intrinsic::x86_sse2_pmovmskb_128: { case Intrinsic::x86_sse2_pmovmskb_128:
case Intrinsic::x86_avx2_pmovmskb: {
// High bits of movmskp{s|d}, pmovmskb are known zero. // High bits of movmskp{s|d}, pmovmskb are known zero.
switch (IntId) { switch (IntId) {
case Intrinsic::x86_sse_movmsk_ps: NumLoBits = 4; break; case Intrinsic::x86_sse_movmsk_ps: NumLoBits = 4; break;
@ -12630,6 +12631,7 @@ void X86TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
case Intrinsic::x86_avx_movmsk_pd_256: NumLoBits = 4; break; case Intrinsic::x86_avx_movmsk_pd_256: NumLoBits = 4; break;
case Intrinsic::x86_mmx_pmovmskb: NumLoBits = 8; break; case Intrinsic::x86_mmx_pmovmskb: NumLoBits = 8; break;
case Intrinsic::x86_sse2_pmovmskb_128: NumLoBits = 16; break; case Intrinsic::x86_sse2_pmovmskb_128: NumLoBits = 16; break;
case Intrinsic::x86_avx2_pmovmskb: NumLoBits = 32; break;
} }
KnownZero = APInt::getHighBitsSet(Mask.getBitWidth(), KnownZero = APInt::getHighBitsSet(Mask.getBitWidth(),
Mask.getBitWidth() - NumLoBits); Mask.getBitWidth() - NumLoBits);
@ -13856,6 +13858,7 @@ static SDValue PerformOrCombine(SDNode *N, SelectionDAG &DAG,
return SDValue(); return SDValue();
} }
// PerformXorCombine - Attempts to turn XOR nodes into BLSMSK nodes
static SDValue PerformXorCombine(SDNode *N, SelectionDAG &DAG, static SDValue PerformXorCombine(SDNode *N, SelectionDAG &DAG,
TargetLowering::DAGCombinerInfo &DCI, TargetLowering::DAGCombinerInfo &DCI,
const X86Subtarget *Subtarget) { const X86Subtarget *Subtarget) {
@ -13867,6 +13870,8 @@ static SDValue PerformXorCombine(SDNode *N, SelectionDAG &DAG,
if (VT != MVT::i32 && VT != MVT::i64) if (VT != MVT::i32 && VT != MVT::i64)
return SDValue(); return SDValue();
assert(Subtarget->hasBMI() && "Creating BLSMSK requires BMI instructions");
// Create BLSMSK instructions by finding X ^ (X-1) // Create BLSMSK instructions by finding X ^ (X-1)
SDValue N0 = N->getOperand(0); SDValue N0 = N->getOperand(0);
SDValue N1 = N->getOperand(1); SDValue N1 = N->getOperand(1);