From ddf025e8dc467f03592deae2f4845fa3c08407eb Mon Sep 17 00:00:00 2001 From: Jason Molenda Date: Wed, 26 Jun 2019 21:41:07 +0000 Subject: [PATCH] Use the // integer divide operator in these target definition files, like Davide's change to x86_64_target_definition.py. llvm-svn: 364481 --- lldb/examples/python/x86_64_linux_target_definition.py | 2 +- lldb/examples/python/x86_64_qemu_target_definition.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/lldb/examples/python/x86_64_linux_target_definition.py b/lldb/examples/python/x86_64_linux_target_definition.py index 7f03da264203..13bde540f7e2 100644 --- a/lldb/examples/python/x86_64_linux_target_definition.py +++ b/lldb/examples/python/x86_64_linux_target_definition.py @@ -740,7 +740,7 @@ def get_target_definition(): # info if 'slice' not in reg_info and 'composite' not in reg_info: reg_info['offset'] = offset - offset += reg_info['bitsize'] / 8 + offset += reg_info['bitsize'] // 8 # Set the GCC/DWARF register number for this register if it has one reg_num = get_reg_num(name_to_gcc_dwarf_regnum, reg_name) diff --git a/lldb/examples/python/x86_64_qemu_target_definition.py b/lldb/examples/python/x86_64_qemu_target_definition.py index 015340fa35f5..aa081c161171 100644 --- a/lldb/examples/python/x86_64_qemu_target_definition.py +++ b/lldb/examples/python/x86_64_qemu_target_definition.py @@ -738,7 +738,7 @@ def get_target_definition(): # info if 'slice' not in reg_info and 'composite' not in reg_info: reg_info['offset'] = offset - offset += reg_info['bitsize'] / 8 + offset += reg_info['bitsize'] // 8 # Set the GCC/DWARF register number for this register if it has one reg_num = get_reg_num(name_to_gcc_dwarf_regnum, reg_name)