Remove the --shrink-wrap option.
It had no tests, was unused and was "experimental at best". llvm-svn: 193749
This commit is contained in:
Rafael Espindola
parent
394d557f41
commit
dbec9d9b2a
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@ -89,7 +89,6 @@ add_llvm_library(LLVMCodeGen
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ScheduleDAGPrinter.cpp
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ScoreboardHazardRecognizer.cpp
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ShadowStackGC.cpp
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ShrinkWrapping.cpp
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SjLjEHPrepare.cpp
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SlotIndexes.cpp
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SpillPlacement.cpp
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@ -14,9 +14,6 @@
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// This pass must be run after register allocation. After this pass is
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// executed, it is illegal to construct MO_FrameIndex operands.
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//
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// This pass provides an optional shrink wrapping variant of prolog/epilog
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// insertion, enabled via --shrink-wrap. See ShrinkWrapping.cpp.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "pei"
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@ -66,6 +63,38 @@ STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged");
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STATISTIC(NumBytesStackSpace,
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"Number of bytes used for stack in all functions");
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void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addPreserved<MachineLoopInfo>();
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AU.addPreserved<MachineDominatorTree>();
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AU.addRequired<TargetPassConfig>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool PEI::isReturnBlock(MachineBasicBlock* MBB) {
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return (MBB && !MBB->empty() && MBB->back().isReturn());
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}
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/// Compute the set of return blocks
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void PEI::calculateSets(MachineFunction &Fn) {
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// Sets used to compute spill, restore placement sets.
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const std::vector<CalleeSavedInfo> &CSI =
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Fn.getFrameInfo()->getCalleeSavedInfo();
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// If no CSRs used, we are done.
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if (CSI.empty())
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return;
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// Save refs to entry and return blocks.
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EntryBlock = Fn.begin();
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for (MachineFunction::iterator MBB = Fn.begin(), E = Fn.end();
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MBB != E; ++MBB)
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if (isReturnBlock(MBB))
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ReturnBlocks.push_back(MBB);
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return;
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}
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/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
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/// frame indexes with appropriate references.
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///
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@ -93,12 +122,8 @@ bool PEI::runOnMachineFunction(MachineFunction &Fn) {
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calculateCalleeSavedRegisters(Fn);
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// Determine placement of CSR spill/restore code:
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// - With shrink wrapping, place spills and restores to tightly
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// enclose regions in the Machine CFG of the function where
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// they are used.
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// - Without shink wrapping (default), place all spills in the
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// entry block, all restores in return blocks.
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placeCSRSpillsAndRestores(Fn);
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// place all spills in the entry block, all restores in return blocks.
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calculateSets(Fn);
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// Add the code to save and restore the callee saved registers
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if (!F->hasFnAttribute(Attribute::Naked))
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@ -141,7 +166,7 @@ bool PEI::runOnMachineFunction(MachineFunction &Fn) {
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<< ") in " << Fn.getName() << ".\n";
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delete RS;
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clearAllSets();
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ReturnBlocks.clear();
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return true;
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}
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@ -283,7 +308,7 @@ void PEI::calculateCalleeSavedRegisters(MachineFunction &F) {
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}
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/// insertCSRSpillsAndRestores - Insert spill and restore code for
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/// callee saved registers used in the function, handling shrink wrapping.
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/// callee saved registers used in the function.
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///
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void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
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// Get callee saved register information.
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@ -301,133 +326,33 @@ void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
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const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
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MachineBasicBlock::iterator I;
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if (!ShrinkWrapThisFunction) {
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// Spill using target interface.
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I = EntryBlock->begin();
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if (!TFI->spillCalleeSavedRegisters(*EntryBlock, I, CSI, TRI)) {
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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// Add the callee-saved register as live-in.
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// It's killed at the spill.
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EntryBlock->addLiveIn(CSI[i].getReg());
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// Insert the spill to the stack frame.
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unsigned Reg = CSI[i].getReg();
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const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
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TII.storeRegToStackSlot(*EntryBlock, I, Reg, true,
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CSI[i].getFrameIdx(), RC, TRI);
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}
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}
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// Restore using target interface.
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for (unsigned ri = 0, re = ReturnBlocks.size(); ri != re; ++ri) {
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MachineBasicBlock* MBB = ReturnBlocks[ri];
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I = MBB->end(); --I;
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// Skip over all terminator instructions, which are part of the return
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// sequence.
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MachineBasicBlock::iterator I2 = I;
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while (I2 != MBB->begin() && (--I2)->isTerminator())
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I = I2;
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bool AtStart = I == MBB->begin();
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MachineBasicBlock::iterator BeforeI = I;
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if (!AtStart)
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--BeforeI;
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// Restore all registers immediately before the return and any
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// terminators that precede it.
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if (!TFI->restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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unsigned Reg = CSI[i].getReg();
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const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
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TII.loadRegFromStackSlot(*MBB, I, Reg,
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CSI[i].getFrameIdx(),
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RC, TRI);
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assert(I != MBB->begin() &&
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"loadRegFromStackSlot didn't insert any code!");
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// Insert in reverse order. loadRegFromStackSlot can insert
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// multiple instructions.
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if (AtStart)
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I = MBB->begin();
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else {
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I = BeforeI;
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++I;
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}
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}
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}
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}
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return;
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}
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// Insert spills.
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std::vector<CalleeSavedInfo> blockCSI;
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for (CSRegBlockMap::iterator BI = CSRSave.begin(),
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BE = CSRSave.end(); BI != BE; ++BI) {
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MachineBasicBlock* MBB = BI->first;
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CSRegSet save = BI->second;
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if (save.empty())
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continue;
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blockCSI.clear();
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for (CSRegSet::iterator RI = save.begin(),
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RE = save.end(); RI != RE; ++RI) {
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blockCSI.push_back(CSI[*RI]);
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}
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assert(blockCSI.size() > 0 &&
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"Could not collect callee saved register info");
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I = MBB->begin();
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// When shrink wrapping, use stack slot stores/loads.
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for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
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// Spill using target interface.
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I = EntryBlock->begin();
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if (!TFI->spillCalleeSavedRegisters(*EntryBlock, I, CSI, TRI)) {
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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// Add the callee-saved register as live-in.
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// It's killed at the spill.
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MBB->addLiveIn(blockCSI[i].getReg());
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EntryBlock->addLiveIn(CSI[i].getReg());
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// Insert the spill to the stack frame.
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unsigned Reg = blockCSI[i].getReg();
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unsigned Reg = CSI[i].getReg();
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const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
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TII.storeRegToStackSlot(*MBB, I, Reg,
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true,
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blockCSI[i].getFrameIdx(),
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TII.storeRegToStackSlot(*EntryBlock, I, Reg, true, CSI[i].getFrameIdx(),
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RC, TRI);
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}
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}
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for (CSRegBlockMap::iterator BI = CSRRestore.begin(),
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BE = CSRRestore.end(); BI != BE; ++BI) {
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MachineBasicBlock* MBB = BI->first;
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CSRegSet restore = BI->second;
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// Restore using target interface.
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for (unsigned ri = 0, re = ReturnBlocks.size(); ri != re; ++ri) {
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MachineBasicBlock *MBB = ReturnBlocks[ri];
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I = MBB->end();
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--I;
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if (restore.empty())
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continue;
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blockCSI.clear();
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for (CSRegSet::iterator RI = restore.begin(),
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RE = restore.end(); RI != RE; ++RI) {
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blockCSI.push_back(CSI[*RI]);
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}
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assert(blockCSI.size() > 0 &&
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"Could not find callee saved register info");
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// If MBB is empty and needs restores, insert at the _beginning_.
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if (MBB->empty()) {
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I = MBB->begin();
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} else {
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I = MBB->end();
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--I;
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// Skip over all terminator instructions, which are part of the
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// return sequence.
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if (! I->isTerminator()) {
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++I;
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} else {
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MachineBasicBlock::iterator I2 = I;
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while (I2 != MBB->begin() && (--I2)->isTerminator())
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I = I2;
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}
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}
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// Skip over all terminator instructions, which are part of the return
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// sequence.
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MachineBasicBlock::iterator I2 = I;
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while (I2 != MBB->begin() && (--I2)->isTerminator())
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I = I2;
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bool AtStart = I == MBB->begin();
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MachineBasicBlock::iterator BeforeI = I;
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@ -436,21 +361,21 @@ void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
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// Restore all registers immediately before the return and any
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// terminators that precede it.
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for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
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unsigned Reg = blockCSI[i].getReg();
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const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
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TII.loadRegFromStackSlot(*MBB, I, Reg,
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blockCSI[i].getFrameIdx(),
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RC, TRI);
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assert(I != MBB->begin() &&
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"loadRegFromStackSlot didn't insert any code!");
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// Insert in reverse order. loadRegFromStackSlot can insert
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// multiple instructions.
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if (AtStart)
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I = MBB->begin();
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else {
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I = BeforeI;
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++I;
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if (!TFI->restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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unsigned Reg = CSI[i].getReg();
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const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
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TII.loadRegFromStackSlot(*MBB, I, Reg, CSI[i].getFrameIdx(), RC, TRI);
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assert(I != MBB->begin() &&
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"loadRegFromStackSlot didn't insert any code!");
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// Insert in reverse order. loadRegFromStackSlot can insert
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// multiple instructions.
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if (AtStart)
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I = MBB->begin();
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else {
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I = BeforeI;
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++I;
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}
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}
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}
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}
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@ -14,9 +14,6 @@
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// This pass must be run after register allocation. After this pass is
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// executed, it is illegal to construct MO_FrameIndex operands.
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//
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// This pass also implements a shrink wrapping variant of prolog/epilog
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// insertion.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_PEI_H
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@ -54,74 +51,16 @@ namespace llvm {
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// stack frame indexes.
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unsigned MinCSFrameIndex, MaxCSFrameIndex;
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// Analysis info for spill/restore placement.
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// "CSR": "callee saved register".
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// CSRegSet contains indices into the Callee Saved Register Info
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// vector built by calculateCalleeSavedRegisters() and accessed
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// via MF.getFrameInfo()->getCalleeSavedInfo().
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typedef SparseBitVector<> CSRegSet;
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// CSRegBlockMap maps MachineBasicBlocks to sets of callee
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// saved register indices.
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typedef DenseMap<MachineBasicBlock*, CSRegSet> CSRegBlockMap;
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// Set and maps for computing CSR spill/restore placement:
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// used in function (UsedCSRegs)
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// used in a basic block (CSRUsed)
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// anticipatable in a basic block (Antic{In,Out})
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// available in a basic block (Avail{In,Out})
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// to be spilled at the entry to a basic block (CSRSave)
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// to be restored at the end of a basic block (CSRRestore)
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CSRegSet UsedCSRegs;
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CSRegBlockMap CSRUsed;
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CSRegBlockMap AnticIn, AnticOut;
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CSRegBlockMap AvailIn, AvailOut;
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CSRegBlockMap CSRSave;
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CSRegBlockMap CSRRestore;
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// Entry and return blocks of the current function.
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MachineBasicBlock* EntryBlock;
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SmallVector<MachineBasicBlock*, 4> ReturnBlocks;
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// Map of MBBs to top level MachineLoops.
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DenseMap<MachineBasicBlock*, MachineLoop*> TLLoops;
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// Flag to control shrink wrapping per-function:
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// may choose to skip shrink wrapping for certain
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// functions.
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bool ShrinkWrapThisFunction;
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// Flag to control whether to use the register scavenger to resolve
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// frame index materialization registers. Set according to
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// TRI->requiresFrameIndexScavenging() for the curren function.
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bool FrameIndexVirtualScavenging;
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#ifndef NDEBUG
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// Machine function handle.
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MachineFunction* MF;
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// Flag indicating that the current function
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// has at least one "short" path in the machine
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// CFG from the entry block to an exit block.
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bool HasFastExitPath;
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#endif
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bool calculateSets(MachineFunction &Fn);
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bool calcAnticInOut(MachineBasicBlock* MBB);
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bool calcAvailInOut(MachineBasicBlock* MBB);
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void calculateAnticAvail(MachineFunction &Fn);
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bool addUsesForMEMERegion(MachineBasicBlock* MBB,
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SmallVectorImpl<MachineBasicBlock *> &blks);
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bool addUsesForTopLevelLoops(SmallVectorImpl<MachineBasicBlock *> &blks);
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bool calcSpillPlacements(MachineBasicBlock* MBB,
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SmallVectorImpl<MachineBasicBlock *> &blks,
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CSRegBlockMap &prevSpills);
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bool calcRestorePlacements(MachineBasicBlock* MBB,
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SmallVectorImpl<MachineBasicBlock *> &blks,
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CSRegBlockMap &prevRestores);
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void placeSpillsAndRestores(MachineFunction &Fn);
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void placeCSRSpillsAndRestores(MachineFunction &Fn);
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void calculateSets(MachineFunction &Fn);
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void calculateCallsInformation(MachineFunction &Fn);
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void calculateCalleeSavedRegisters(MachineFunction &Fn);
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void insertCSRSpillsAndRestores(MachineFunction &Fn);
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@ -132,44 +71,8 @@ namespace llvm {
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void scavengeFrameVirtualRegs(MachineFunction &Fn);
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void insertPrologEpilogCode(MachineFunction &Fn);
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// Initialize DFA sets, called before iterations.
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void clearAnticAvailSets();
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// Clear all sets constructed by shrink wrapping.
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void clearAllSets();
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// Initialize all shrink wrapping data.
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void initShrinkWrappingInfo();
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// Convienences for dealing with machine loops.
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MachineBasicBlock* getTopLevelLoopPreheader(MachineLoop* LP);
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MachineLoop* getTopLevelLoopParent(MachineLoop *LP);
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// Propgate CSRs used in MBB to all MBBs of loop LP.
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void propagateUsesAroundLoop(MachineBasicBlock* MBB, MachineLoop* LP);
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// Convenience for recognizing return blocks.
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bool isReturnBlock(MachineBasicBlock* MBB);
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#ifndef NDEBUG
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// Debugging methods.
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// Mark this function as having fast exit paths.
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void findFastExitPath();
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// Verify placement of spills/restores.
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void verifySpillRestorePlacement();
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std::string getBasicBlockName(const MachineBasicBlock* MBB);
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std::string stringifyCSRegSet(const CSRegSet& s);
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void dumpSet(const CSRegSet& s);
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void dumpUsed(MachineBasicBlock* MBB);
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void dumpAllUsed();
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void dumpSets(MachineBasicBlock* MBB);
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void dumpSets1(MachineBasicBlock* MBB);
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void dumpAllSets();
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void dumpSRSets();
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#endif
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};
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} // End llvm namespace
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#endif
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