diff --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
index 56706689fd6b..aaa39674d780 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -288,13 +288,12 @@ namespace ISD {
     // value as an integer 0/1 value.
     FGETSIGN,
 
-    /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector
-    /// with the specified, possibly variable, elements.  The number of elements
-    /// is required to be a power of two.  The types of the operands must
-    /// all be the same.  They must match the vector element type, except if an 
-    /// integer element type is not legal for the target, the operands may 
-    /// be promoted to a legal type, in which case the operands are implicitly
-    /// truncated to the vector element types.
+    /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the
+    /// specified, possibly variable, elements.  The number of elements is
+    /// required to be a power of two.  The types of the operands must all be
+    /// the same and must match the vector element type, except that integer
+    /// types are allowed to be larger than the element type, in which case
+    /// the operands are implicitly truncated.
     BUILD_VECTOR,
 
     /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index d1ef0815c810..72b3e3627ed5 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3811,12 +3811,8 @@ ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *BV, MVT DstEltVT) {
       SDValue Op = BV->getOperand(i);
       // If the vector element type is not legal, the BUILD_VECTOR operands
       // are promoted and implicitly truncated.  Make that explicit here.
-      if (Op.getValueType() != SrcEltVT) {
-        if (Op.getOpcode() == ISD::UNDEF)
-          Op = DAG.getUNDEF(SrcEltVT);
-        else
-          Op = DAG.getNode(ISD::TRUNCATE, BV->getDebugLoc(), SrcEltVT, Op);
-      }
+      if (Op.getValueType() != SrcEltVT)
+        Op = DAG.getNode(ISD::TRUNCATE, BV->getDebugLoc(), SrcEltVT, Op);
       Ops.push_back(DAG.getNode(ISD::BIT_CONVERT, BV->getDebugLoc(),
                                 DstEltVT, Op));
       AddToWorkList(Ops.back().getNode());
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 2dfe0e3b7de2..b2581131f9fc 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -808,9 +808,8 @@ SDValue DAGTypeLegalizer::PromoteIntOp_BUILD_VECTOR(SDNode *N) {
          "Type of inserted value narrower than vector element type!");
 
   SmallVector<SDValue, 16> NewOps;
-  for (unsigned i = 0; i < NumElts; ++i) {
+  for (unsigned i = 0; i < NumElts; ++i)
     NewOps.push_back(GetPromotedInteger(N->getOperand(i)));
-  }
 
   return DAG.UpdateNodeOperands(SDValue(N, 0), &NewOps[0], NumElts);
 }
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index be0102c846ad..33103cb9be56 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2556,7 +2556,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
       if (Elt.getValueType() != VT) {
         // If the vector element type is not legal, the BUILD_VECTOR operands
         // are promoted and implicitly truncated.  Make that explicit here.
-        assert(Elt.getValueType() == TLI.getTypeToTransformTo(VT) &&
+        assert(VT.isInteger() && Elt.getValueType().isInteger() &&
+               VT.bitsLE(Elt.getValueType()) &&
                "Bad type for BUILD_VECTOR operand");
         Elt = getNode(ISD::TRUNCATE, DL, VT, Elt);
       }