Add debug output and asserts to the phi-connecting code.
llvm-svn: 124813
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@ -978,16 +978,27 @@ void SplitEditor::finish() {
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const VNInfo *PHIVNI = *I;
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if (!PHIVNI->isPHIDef())
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continue;
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LiveIntervalMap &LIM = LIMappers[RegAssign.lookup(PHIVNI->def)];
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unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
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LiveIntervalMap &LIM = LIMappers[RegIdx];
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MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
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DEBUG(dbgs() << " map phi in BB#" << MBB->getNumber() << '@' << PHIVNI->def
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<< " -> " << RegIdx << '\n');
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for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
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PE = MBB->pred_end(); PI != PE; ++PI) {
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SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
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DEBUG(dbgs() << " pred BB#" << (*PI)->getNumber() << '@' << End);
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// The predecessor may not have a live-out value. That is OK, like an
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// undef PHI operand.
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if (VNInfo *VNI = Edit.getParent().getVNInfoAt(End))
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if (VNInfo *VNI = Edit.getParent().getVNInfoAt(End)) {
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DEBUG(dbgs() << " has parent valno #" << VNI->id << " live out\n");
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assert(RegAssign.lookup(End) == RegIdx &&
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"Different register assignment in phi predecessor");
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LIM.mapValue(VNI, End);
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}
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else
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DEBUG(dbgs() << " is not live-out\n");
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}
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DEBUG(dbgs() << " " << *LIM.getLI() << '\n');
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}
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// Rewrite instructions.
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