[X86] Add some more movmsk test cases. NFC
These IR patterns represent the exact behavior of a movmsk instruction using (zext (bitcast (icmp slt X, 0))). For the v4i32/v8i32/v2i64/v4i64 we currently emit a PCMPGT for the icmp slt which is unnecessary since we only care about the sign bit of the result. This is because of the int->fp bitcast we put on the input to the movmsk nodes for these cases. I'll be fixing this in a future patch. llvm-svn: 343045
This commit is contained in:
Craig Topper
parent
3ff0777064
commit
d8c68840c8
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@ -3784,3 +3784,235 @@ define i1 @allzeros_v8i64_and4(<8 x i64> %arg) {
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%tmp3 = icmp eq i8 %tmp2, 0
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%tmp3 = icmp eq i8 %tmp2, 0
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ret i1 %tmp3
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ret i1 %tmp3
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}
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}
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; The below are IR patterns that should directly represent the behavior of a
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; MOVMSK instruction.
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define i32 @movmskpd(<2 x double> %x) {
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; SSE2-LABEL: movmskpd:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,0,2147483648,0]
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; SSE2-NEXT: pxor %xmm1, %xmm0
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; SSE2-NEXT: movdqa %xmm1, %xmm2
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; SSE2-NEXT: pcmpgtd %xmm0, %xmm2
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; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
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; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
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; SSE2-NEXT: pand %xmm3, %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
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; SSE2-NEXT: por %xmm0, %xmm1
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; SSE2-NEXT: movmskpd %xmm1, %eax
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; SSE2-NEXT: retq
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;
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; AVX-LABEL: movmskpd:
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; AVX: # %bb.0:
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; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
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; AVX-NEXT: vmovmskpd %xmm0, %eax
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; AVX-NEXT: retq
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;
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; SKX-LABEL: movmskpd:
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; SKX: # %bb.0:
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; SKX-NEXT: vpmovq2m %xmm0, %k0
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; SKX-NEXT: kmovd %k0, %eax
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; SKX-NEXT: andl $3, %eax
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; SKX-NEXT: retq
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%a = bitcast <2 x double> %x to <2 x i64>
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%b = icmp slt <2 x i64> %a, zeroinitializer
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%c = bitcast <2 x i1> %b to i2
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%d = zext i2 %c to i32
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ret i32 %d
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}
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define i32 @movmskps(<4 x float> %x) {
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; SSE2-LABEL: movmskps:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: pcmpgtd %xmm0, %xmm1
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; SSE2-NEXT: movmskps %xmm1, %eax
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; SSE2-NEXT: retq
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;
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; AVX-LABEL: movmskps:
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; AVX: # %bb.0:
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; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
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; AVX-NEXT: vmovmskps %xmm0, %eax
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; AVX-NEXT: retq
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;
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; SKX-LABEL: movmskps:
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; SKX: # %bb.0:
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; SKX-NEXT: vpmovd2m %xmm0, %k0
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; SKX-NEXT: kmovd %k0, %eax
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; SKX-NEXT: andl $15, %eax
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; SKX-NEXT: retq
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%a = bitcast <4 x float> %x to <4 x i32>
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%b = icmp slt <4 x i32> %a, zeroinitializer
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%c = bitcast <4 x i1> %b to i4
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%d = zext i4 %c to i32
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ret i32 %d
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}
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define i32 @movmskpd256(<4 x double> %x) {
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; SSE2-LABEL: movmskpd256:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,0,2147483648,0]
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; SSE2-NEXT: pxor %xmm2, %xmm1
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; SSE2-NEXT: movdqa %xmm2, %xmm3
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; SSE2-NEXT: pcmpgtd %xmm1, %xmm3
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; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
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; SSE2-NEXT: pcmpeqd %xmm2, %xmm1
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
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; SSE2-NEXT: pand %xmm4, %xmm1
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; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
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; SSE2-NEXT: por %xmm1, %xmm3
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; SSE2-NEXT: pxor %xmm2, %xmm0
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; SSE2-NEXT: movdqa %xmm2, %xmm1
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; SSE2-NEXT: pcmpgtd %xmm0, %xmm1
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; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[0,0,2,2]
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; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
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; SSE2-NEXT: pand %xmm4, %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
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; SSE2-NEXT: por %xmm0, %xmm1
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; SSE2-NEXT: packssdw %xmm3, %xmm1
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; SSE2-NEXT: movmskps %xmm1, %eax
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: movmskpd256:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; AVX1-NEXT: vpcmpgtq %xmm1, %xmm2, %xmm1
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; AVX1-NEXT: vpcmpgtq %xmm0, %xmm2, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX1-NEXT: vmovmskpd %ymm0, %eax
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: movmskpd256:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX2-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
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; AVX2-NEXT: vmovmskpd %ymm0, %eax
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; SKX-LABEL: movmskpd256:
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; SKX: # %bb.0:
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; SKX-NEXT: vpmovq2m %ymm0, %k0
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; SKX-NEXT: kmovd %k0, %eax
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; SKX-NEXT: andl $15, %eax
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; SKX-NEXT: vzeroupper
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; SKX-NEXT: retq
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%a = bitcast <4 x double> %x to <4 x i64>
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%b = icmp slt <4 x i64> %a, zeroinitializer
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%c = bitcast <4 x i1> %b to i4
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%d = zext i4 %c to i32
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ret i32 %d
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}
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define i32 @movmskps256(<8 x float> %x) {
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; SSE2-LABEL: movmskps256:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pxor %xmm2, %xmm2
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; SSE2-NEXT: pxor %xmm3, %xmm3
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; SSE2-NEXT: pcmpgtd %xmm1, %xmm3
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; SSE2-NEXT: pcmpgtd %xmm0, %xmm2
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; SSE2-NEXT: packssdw %xmm3, %xmm2
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; SSE2-NEXT: packsswb %xmm0, %xmm2
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; SSE2-NEXT: pmovmskb %xmm2, %eax
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; SSE2-NEXT: movzbl %al, %eax
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: movmskps256:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; AVX1-NEXT: vpcmpgtd %xmm1, %xmm2, %xmm1
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; AVX1-NEXT: vpcmpgtd %xmm0, %xmm2, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX1-NEXT: vmovmskps %ymm0, %eax
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: movmskps256:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX2-NEXT: vpcmpgtd %ymm0, %ymm1, %ymm0
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; AVX2-NEXT: vmovmskps %ymm0, %eax
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; SKX-LABEL: movmskps256:
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; SKX: # %bb.0:
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; SKX-NEXT: vpmovd2m %ymm0, %k0
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; SKX-NEXT: kmovb %k0, %eax
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; SKX-NEXT: vzeroupper
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; SKX-NEXT: retq
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%a = bitcast <8 x float> %x to <8 x i32>
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%b = icmp slt <8 x i32> %a, zeroinitializer
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%c = bitcast <8 x i1> %b to i8
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%d = zext i8 %c to i32
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ret i32 %d
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}
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define i32 @movmskb(<16 x i8> %x) {
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; SSE2-LABEL: movmskb:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pmovmskb %xmm0, %eax
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; SSE2-NEXT: retq
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;
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; AVX-LABEL: movmskb:
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; AVX: # %bb.0:
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; AVX-NEXT: vpmovmskb %xmm0, %eax
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; AVX-NEXT: retq
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;
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; SKX-LABEL: movmskb:
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; SKX: # %bb.0:
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; SKX-NEXT: vpmovb2m %xmm0, %k0
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; SKX-NEXT: kmovw %k0, %eax
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; SKX-NEXT: retq
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%a = icmp slt <16 x i8> %x, zeroinitializer
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%b = bitcast <16 x i1> %a to i16
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%c = zext i16 %b to i32
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ret i32 %c
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}
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define i32 @movmskb256(<32 x i8> %x) {
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; SSE2-LABEL: movmskb256:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pmovmskb %xmm0, %ecx
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; SSE2-NEXT: pmovmskb %xmm1, %eax
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; SSE2-NEXT: shll $16, %eax
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; SSE2-NEXT: orl %ecx, %eax
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; SSE2-NEXT: retq
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;
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; AVX1-LABEL: movmskb256:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm2
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; AVX1-NEXT: vpmovmskb %xmm2, %ecx
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
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; AVX1-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0
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; AVX1-NEXT: vpmovmskb %xmm0, %eax
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; AVX1-NEXT: shll $16, %eax
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; AVX1-NEXT: orl %ecx, %eax
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: movmskb256:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpmovmskb %ymm0, %eax
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; SKX-LABEL: movmskb256:
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; SKX: # %bb.0:
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; SKX-NEXT: vpmovb2m %ymm0, %k0
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; SKX-NEXT: kmovd %k0, %eax
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; SKX-NEXT: vzeroupper
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; SKX-NEXT: retq
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%a = icmp slt <32 x i8> %x, zeroinitializer
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%b = bitcast <32 x i1> %a to i32
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ret i32 %b
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}
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