[ARM] Add missing M/R class CPUs
Add some of the missing M and R class Cortex CPUs, namely: Cortex-M0+ (called Cortex-M0plus for GCC compatibility) Cortex-M1 SC000 SC300 Cortex-R5 llvm-svn: 229661
This commit is contained in:
Bradley Smith
parent
26c9922a59
commit
d86d670e85
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@ -4028,7 +4028,7 @@ public:
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Features["hwdiv-arm"] = true;
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Features["crc"] = true;
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Features["crypto"] = true;
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} else if (CPU == "cortex-r5" ||
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} else if (CPU == "cortex-r5" || CPU == "cortex-r7" ||
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// Enable the hwdiv extension for all v8a AArch32 cores by
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// default.
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ArchName == "armv8a" || ArchName == "armv8" ||
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@ -4037,7 +4037,8 @@ public:
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ArchName == "thumbebv8a" || ArchName == "thumbebv8") {
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Features["hwdiv"] = true;
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Features["hwdiv-arm"] = true;
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} else if (CPU == "cortex-m3" || CPU == "cortex-m4" || CPU == "cortex-m7") {
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} else if (CPU == "cortex-m3" || CPU == "cortex-m4" || CPU == "cortex-m7" ||
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CPU == "sc300") {
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Features["hwdiv"] = true;
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}
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}
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@ -4135,12 +4136,12 @@ public:
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.Cases("cortex-a5", "cortex-a7", "cortex-a8", "7A")
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.Cases("cortex-a9", "cortex-a12", "cortex-a15", "cortex-a17", "krait",
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"7A")
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.Cases("cortex-r4", "cortex-r5", "7R")
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.Cases("cortex-r4", "cortex-r5", "cortex-r7", "7R")
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.Case("swift", "7S")
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.Case("cyclone", "8A")
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.Case("cortex-m3", "7M")
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.Cases("sc300", "cortex-m3", "7M")
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.Cases("cortex-m4", "cortex-m7", "7EM")
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.Case("cortex-m0", "6M")
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.Cases("sc000", "cortex-m0", "cortex-m0plus", "cortex-m1", "6M")
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.Cases("cortex-a53", "cortex-a57", "cortex-a72", "8A")
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.Default(nullptr);
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}
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@ -4150,8 +4151,9 @@ public:
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.Cases("cortex-a9", "cortex-a12", "cortex-a15", "cortex-a17", "krait",
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"A")
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.Cases("cortex-a53", "cortex-a57", "cortex-a72", "A")
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.Cases("cortex-m3", "cortex-m4", "cortex-m0", "cortex-m7", "M")
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.Cases("cortex-r4", "cortex-r5", "R")
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.Cases("cortex-m3", "cortex-m4", "cortex-m0", "cortex-m0plus", "M")
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.Cases("cortex-m1", "cortex-m7", "sc000", "sc300", "M")
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.Cases("cortex-r4", "cortex-r5", "cortex-r7", "R")
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.Default("");
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}
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bool setCPU(const std::string &Name) override {
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@ -132,11 +132,11 @@ static const char *GetArmArchForMCpu(StringRef Value) {
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.Cases("arm1020t", "arm1020e", "arm1022e", "arm1026ej-s", "armv5")
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.Case("xscale", "xscale")
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.Cases("arm1136j-s", "arm1136jf-s", "arm1176jz-s", "arm1176jzf-s", "armv6")
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.Case("cortex-m0", "armv6m")
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.Cases("sc000", "cortex-m0", "cortex-m0plus", "cortex-m1", "armv6m")
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.Cases("cortex-a5", "cortex-a7", "cortex-a8", "armv7")
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.Cases("cortex-a9", "cortex-a12", "cortex-a15", "cortex-a17", "krait", "armv7")
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.Cases("cortex-r4", "cortex-r5", "armv7r")
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.Case("cortex-m3", "armv7m")
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.Cases("cortex-r4", "cortex-r5", "cortex-r7", "armv7r")
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.Cases("sc300", "cortex-m3", "armv7m")
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.Cases("cortex-m4", "cortex-m7", "armv7em")
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.Case("swift", "armv7s")
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.Default(nullptr);
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@ -5566,9 +5566,9 @@ const char *arm::getLLVMArchSuffixForARM(StringRef CPU) {
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.Cases("arm1156t2-s", "arm1156t2f-s", "v6t2")
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.Cases("cortex-a5", "cortex-a7", "cortex-a8", "v7")
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.Cases("cortex-a9", "cortex-a12", "cortex-a15", "cortex-a17", "krait", "v7")
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.Cases("cortex-r4", "cortex-r5", "v7r")
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.Case("cortex-m0", "v6m")
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.Case("cortex-m3", "v7m")
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.Cases("cortex-r4", "cortex-r5", "cortex-r7", "v7r")
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.Cases("sc000", "cortex-m0", "cortex-m0plus", "cortex-m1", "v6m")
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.Cases("sc300", "cortex-m3", "v7m")
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.Cases("cortex-m4", "cortex-m7", "v7em")
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.Case("swift", "v7s")
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.Case("cyclone", "v8")
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@ -230,10 +230,15 @@
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// CHECK-BE-CPUV7A-THUMB: "-cc1"{{.*}} "-triple" "thumbebv7-{{.*}}
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-m0 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV6M %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-m0plus -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV6M %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-m1 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV6M %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=sc000 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV6M %s
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// CHECK-CPUV6M: "-cc1"{{.*}} "-triple" "thumbv6m-{{.*}}
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-m3 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7M %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-m3 -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7M %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=sc300 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7M %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=sc300 -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7M %s
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// CHECK-CPUV7M: "-cc1"{{.*}} "-triple" "thumbv7m-{{.*}}
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// RUN: %clang -target armeb-linux-gnueabi -mcpu=cortex-m3 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7M %s
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@ -254,26 +259,34 @@
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r5 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r7 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r4 -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r5 -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r7 -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R %s
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// CHECK-CPUV7R: "-cc1"{{.*}} "-triple" "armv7r-{{.*}}
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// RUN: %clang -target armeb-linux-gnueabi -mcpu=cortex-r4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7R %s
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// RUN: %clang -target armeb-linux-gnueabi -mcpu=cortex-r5 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7R %s
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// RUN: %clang -target armeb-linux-gnueabi -mcpu=cortex-r7 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7R %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r4 -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7R %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r5 -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7R %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r7 -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7R %s
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// CHECK-BE-CPUV7R: "-cc1"{{.*}} "-triple" "armebv7r-{{.*}}
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r4 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R-THUMB %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r5 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R-THUMB %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r7 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R-THUMB %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r4 -mlittle-endian -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R-THUMB %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r5 -mlittle-endian -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R-THUMB %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r7 -mlittle-endian -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R-THUMB %s
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// CHECK-CPUV7R-THUMB: "-cc1"{{.*}} "-triple" "thumbv7r-{{.*}}
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// RUN: %clang -target armeb-linux-gnueabi -mcpu=cortex-r4 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7R-THUMB %s
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// RUN: %clang -target armeb-linux-gnueabi -mcpu=cortex-r5 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7R-THUMB %s
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// RUN: %clang -target armeb-linux-gnueabi -mcpu=cortex-r7 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7R-THUMB %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r4 -mbig-endian -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7R-THUMB %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r5 -mbig-endian -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7R-THUMB %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r7 -mbig-endian -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7R-THUMB %s
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// CHECK-BE-CPUV7R-THUMB: "-cc1"{{.*}} "-triple" "thumbebv7r-{{.*}}
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// RUN: %clang -target arm -mcpu=cortex-a53 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV8A %s
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@ -273,13 +273,26 @@
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// R5-THUMB:#define __ARM_ARCH_EXT_IDIV__ 1
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// R5-THUMB:#define __ARM_FEATURE_DSP
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// Test whether predefines are as expected when targeting cortex-r7.
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// RUN: %clang -target armv7 -mcpu=cortex-r7 -x c -E -dM %s -o - | FileCheck --check-prefix=R7-ARM %s
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// R7-ARM:#define __ARM_ARCH_EXT_IDIV__ 1
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// R7-ARM:#define __ARM_FEATURE_DSP
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// RUN: %clang -target armv7 -mthumb -mcpu=cortex-r7 -x c -E -dM %s -o - | FileCheck --check-prefix=R7-THUMB %s
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// R7-THUMB:#define __ARM_ARCH_EXT_IDIV__ 1
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// R7-THUMB:#define __ARM_FEATURE_DSP
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// Test whether predefines are as expected when targeting cortex-m0.
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// RUN: %clang -target armv7 -mthumb -mcpu=cortex-m0 -x c -E -dM %s -o - | FileCheck --check-prefix=M0-THUMB %s
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// RUN: %clang -target armv7 -mthumb -mcpu=cortex-m0plus -x c -E -dM %s -o - | FileCheck --check-prefix=M0-THUMB %s
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// RUN: %clang -target armv7 -mthumb -mcpu=cortex-m1 -x c -E -dM %s -o - | FileCheck --check-prefix=M0-THUMB %s
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// RUN: %clang -target armv7 -mthumb -mcpu=sc000 -x c -E -dM %s -o - | FileCheck --check-prefix=M0-THUMB %s
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// M0-THUMB-NOT:#define __ARM_ARCH_EXT_IDIV__
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// M0-THUMB-NOT:#define __ARM_FEATURE_DSP
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// Test whether predefines are as expected when targeting cortex-m3.
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// RUN: %clang -target armv7 -mthumb -mcpu=cortex-m3 -x c -E -dM %s -o - | FileCheck --check-prefix=M3-THUMB %s
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// RUN: %clang -target armv7 -mthumb -mcpu=sc300 -x c -E -dM %s -o - | FileCheck --check-prefix=M3-THUMB %s
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// M3-THUMB:#define __ARM_ARCH_EXT_IDIV__ 1
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// M3-THUMB-NOT:#define __ARM_FEATURE_DSP
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