[AArch64] Support selecting TPIDR_EL[1-3] as the thread base
Add an -mtp=el[0-3] option to select which of the AArch64 thread ID registers will be used for the TLS base pointer. This is a followup to rL356657 which added subtarget features to enable accesses to the privileged thread ID registers. Patch by Philip Derrin! Differential revision: https://reviews.llvm.org/D59631 llvm-svn: 357250
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@ -2016,8 +2016,8 @@ def mexecute_only : Flag<["-"], "mexecute-only">, Group<m_arm_Features_Group>,
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HelpText<"Disallow generation of data access to code sections (ARM only)">;
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def mno_execute_only : Flag<["-"], "mno-execute-only">, Group<m_arm_Features_Group>,
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HelpText<"Allow generation of data access to code sections (ARM only)">;
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def mtp_mode_EQ : Joined<["-"], "mtp=">, Group<m_arm_Features_Group>, Values<"soft, cp15">,
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HelpText<"Read thread pointer from coprocessor register (ARM only)">;
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def mtp_mode_EQ : Joined<["-"], "mtp=">, Group<m_arm_Features_Group>, Values<"soft,cp15,el0,el1,el2,el3">,
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HelpText<"Thread pointer access method (AArch32/AArch64 only)">;
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def mpure_code : Flag<["-"], "mpure-code">, Alias<mexecute_only>; // Alias for GCC compatibility
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def mno_pure_code : Flag<["-"], "mno-pure-code">, Alias<mno_execute_only>;
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def mtvos_version_min_EQ : Joined<["-"], "mtvos-version-min=">, Group<m_Group>;
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@ -194,6 +194,18 @@ void aarch64::getAArch64TargetFeatures(const Driver &D,
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Features.push_back("-neon");
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}
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if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
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StringRef Mtp = A->getValue();
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if (Mtp == "el3")
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Features.push_back("+tpidr-el3");
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else if (Mtp == "el2")
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Features.push_back("+tpidr-el2");
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else if (Mtp == "el1")
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Features.push_back("+tpidr-el1");
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else if (Mtp != "el0")
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D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args);
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}
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// En/disable crc
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if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) {
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if (A->getOption().matches(options::OPT_mcrc))
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@ -120,6 +120,36 @@
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// RUN: FileCheck -check-prefix=ARMv7_THREAD_POINTER_NON %s
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// ARMv7_THREAD_POINTER_NON-NOT: "-target-feature" "+read-tp-hard"
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// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a 2>&1 | \
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// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_NON %s
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// ARMv8_THREAD_POINTER_NON-NOT: "-target-feature" "+tpidr-el1"
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// ARMv8_THREAD_POINTER_NON-NOT: "-target-feature" "+tpidr-el2"
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// ARMv8_THREAD_POINTER_NON-NOT: "-target-feature" "+tpidr-el3"
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// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a -mtp=el0 2>&1 | \
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// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_EL0 %s
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// ARMv8_THREAD_POINTER_EL0-NOT: "-target-feature" "+tpidr-el1"
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// ARMv8_THREAD_POINTER_EL0-NOT: "-target-feature" "+tpidr-el2"
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// ARMv8_THREAD_POINTER_EL0-NOT: "-target-feature" "+tpidr-el3"
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// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a -mtp=el1 2>&1 | \
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// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_EL1 %s
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// ARMv8_THREAD_POINTER_EL1: "-target-feature" "+tpidr-el1"
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// ARMv8_THREAD_POINTER_EL1-NOT: "-target-feature" "+tpidr-el2"
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// ARMv8_THREAD_POINTER_EL1-NOT: "-target-feature" "+tpidr-el3"
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// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a -mtp=el2 2>&1 | \
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// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_EL2 %s
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// ARMv8_THREAD_POINTER_EL2-NOT: "-target-feature" "+tpidr-el1"
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// ARMv8_THREAD_POINTER_EL2: "-target-feature" "+tpidr-el2"
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// ARMv8_THREAD_POINTER_EL2-NOT: "-target-feature" "+tpidr-el3"
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// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a -mtp=el3 2>&1 | \
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// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_EL3 %s
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// ARMv8_THREAD_POINTER_EL3-NOT: "-target-feature" "+tpidr-el1"
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// ARMv8_THREAD_POINTER_EL3-NOT: "-target-feature" "+tpidr-el2"
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// ARMv8_THREAD_POINTER_EL3: "-target-feature" "+tpidr-el3"
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// RUN: %clang -target powerpc64-unknown-linux-gnu \
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// RUN: -### -S %s -mcpu=G5 2>&1 | FileCheck -check-prefix=PPCG5 %s
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// PPCG5: clang
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