[mips] Remove remaining use of MipsCC::intArgRegs() in favour of MipsABIInfo::GetByValArgRegs() and MipsABIInfo::GetVarArgRegs()

Summary: Depends on D6112

Reviewers: theraven, vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6113

llvm-svn: 221521
This commit is contained in:
Daniel Sanders 2014-11-07 12:21:37 +00:00
parent 70075620b3
commit d7eba31508
4 changed files with 18 additions and 15 deletions

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@ -27,3 +27,11 @@ const ArrayRef<MCPhysReg> MipsABIInfo::GetByValArgRegs() const {
return makeArrayRef(Mips64IntRegs); return makeArrayRef(Mips64IntRegs);
llvm_unreachable("Unhandled ABI"); llvm_unreachable("Unhandled ABI");
} }
const ArrayRef<MCPhysReg> MipsABIInfo::GetVarArgRegs() const {
if (IsO32())
return makeArrayRef(O32IntRegs);
if (IsN32() || IsN64())
return makeArrayRef(Mips64IntRegs);
llvm_unreachable("Unhandled ABI");
}

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@ -38,8 +38,12 @@ public:
bool IsEABI() const { return ThisABI == ABI::EABI; } bool IsEABI() const { return ThisABI == ABI::EABI; }
ABI GetEnumValue() const { return ThisABI; } ABI GetEnumValue() const { return ThisABI; }
/// The registers to use for byval arguments.
const ArrayRef<MCPhysReg> GetByValArgRegs() const; const ArrayRef<MCPhysReg> GetByValArgRegs() const;
/// The registers to use for the variable argument list.
const ArrayRef<MCPhysReg> GetVarArgRegs() const;
/// Ordering of ABI's /// Ordering of ABI's
/// MipsGenSubtargetInfo.inc will use this to resolve conflicts when given /// MipsGenSubtargetInfo.inc will use this to resolve conflicts when given
/// multiple ABI options. /// multiple ABI options.

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@ -3628,12 +3628,6 @@ unsigned MipsTargetLowering::MipsCC::reservedArgArea() const {
return (Subtarget.isABI_O32() && (CallConv != CallingConv::Fast)) ? 16 : 0; return (Subtarget.isABI_O32() && (CallConv != CallingConv::Fast)) ? 16 : 0;
} }
const ArrayRef<MCPhysReg> MipsTargetLowering::MipsCC::intArgRegs() const {
if (Subtarget.isABI_O32())
return makeArrayRef(O32IntRegs);
return makeArrayRef(Mips64IntRegs);
}
void MipsTargetLowering::copyByValRegs( void MipsTargetLowering::copyByValRegs(
SDValue Chain, SDLoc DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG, SDValue Chain, SDLoc DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG,
const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals, const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals,
@ -3646,11 +3640,11 @@ void MipsTargetLowering::copyByValRegs(
unsigned RegAreaSize = NumRegs * GPRSizeInBytes; unsigned RegAreaSize = NumRegs * GPRSizeInBytes;
unsigned FrameObjSize = std::max(Flags.getByValSize(), RegAreaSize); unsigned FrameObjSize = std::max(Flags.getByValSize(), RegAreaSize);
int FrameObjOffset; int FrameObjOffset;
ArrayRef<MCPhysReg> ByValArgRegs = Subtarget.getABI().GetByValArgRegs();
if (RegAreaSize) if (RegAreaSize)
FrameObjOffset = FrameObjOffset = (int)CC.reservedArgArea() -
(int)CC.reservedArgArea() - (int)((ByValArgRegs.size() - FirstReg) * GPRSizeInBytes);
(int)((CC.intArgRegs().size() - FirstReg) * GPRSizeInBytes);
else else
FrameObjOffset = VA.getLocMemOffset(); FrameObjOffset = VA.getLocMemOffset();
@ -3668,7 +3662,7 @@ void MipsTargetLowering::copyByValRegs(
const TargetRegisterClass *RC = getRegClassFor(RegTy); const TargetRegisterClass *RC = getRegClassFor(RegTy);
for (unsigned I = 0; I < NumRegs; ++I) { for (unsigned I = 0; I < NumRegs; ++I) {
unsigned ArgReg = CC.intArgRegs()[FirstReg + I]; unsigned ArgReg = ByValArgRegs[FirstReg + I];
unsigned VReg = addLiveIn(MF, ArgReg, RC); unsigned VReg = addLiveIn(MF, ArgReg, RC);
unsigned Offset = I * GPRSizeInBytes; unsigned Offset = I * GPRSizeInBytes;
SDValue StorePtr = DAG.getNode(ISD::ADD, DL, PtrTy, FIN, SDValue StorePtr = DAG.getNode(ISD::ADD, DL, PtrTy, FIN,
@ -3696,7 +3690,7 @@ void MipsTargetLowering::passByValArg(
unsigned NumRegs = LastReg - FirstReg; unsigned NumRegs = LastReg - FirstReg;
if (NumRegs) { if (NumRegs) {
const ArrayRef<MCPhysReg> ArgRegs = CC.intArgRegs(); const ArrayRef<MCPhysReg> ArgRegs = Subtarget.getABI().GetByValArgRegs();
bool LeftoverBytes = (NumRegs * RegSizeInBytes > ByValSizeInBytes); bool LeftoverBytes = (NumRegs * RegSizeInBytes > ByValSizeInBytes);
unsigned I = 0; unsigned I = 0;
@ -3779,7 +3773,7 @@ void MipsTargetLowering::writeVarArgRegs(std::vector<SDValue> &OutChains,
const MipsCC &CC, SDValue Chain, const MipsCC &CC, SDValue Chain,
SDLoc DL, SelectionDAG &DAG, SDLoc DL, SelectionDAG &DAG,
CCState &State) const { CCState &State) const {
const ArrayRef<MCPhysReg> ArgRegs = CC.intArgRegs(); const ArrayRef<MCPhysReg> ArgRegs = Subtarget.getABI().GetVarArgRegs();
unsigned Idx = State.getFirstUnallocated(ArgRegs.data(), ArgRegs.size()); unsigned Idx = State.getFirstUnallocated(ArgRegs.data(), ArgRegs.size());
unsigned RegSizeInBytes = Subtarget.getGPRSizeInBytes(); unsigned RegSizeInBytes = Subtarget.getGPRSizeInBytes();
MVT RegTy = MVT::getIntegerVT(RegSizeInBytes * 8); MVT RegTy = MVT::getIntegerVT(RegSizeInBytes * 8);

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@ -367,9 +367,6 @@ namespace llvm {
/// register arguments. This is 16-byte if ABI is O32. /// register arguments. This is 16-byte if ABI is O32.
unsigned reservedArgArea() const; unsigned reservedArgArea() const;
/// Return pointer to array of integer argument registers.
const ArrayRef<MCPhysReg> intArgRegs() const;
private: private:
CallingConv::ID CallConv; CallingConv::ID CallConv;
const MipsSubtarget &Subtarget; const MipsSubtarget &Subtarget;