[SelectionDAG] Simplify the ISD::SIGN_EXTEND/ZERO_EXTEND handling to use less temporary APInts by counting bits instead. NFCI
llvm-svn: 315628
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@ -1079,61 +1079,47 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op,
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}
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}
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case ISD::ZERO_EXTEND: {
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case ISD::ZERO_EXTEND: {
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unsigned OperandBitWidth = Op.getOperand(0).getScalarValueSizeInBits();
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unsigned OperandBitWidth = Op.getOperand(0).getScalarValueSizeInBits();
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APInt InMask = NewMask.trunc(OperandBitWidth);
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// If none of the top bits are demanded, convert this into an any_extend.
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// If none of the top bits are demanded, convert this into an any_extend.
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APInt NewBits =
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if (NewMask.getActiveBits() <= OperandBitWidth)
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APInt::getHighBitsSet(BitWidth, BitWidth - OperandBitWidth) & NewMask;
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if (!NewBits.intersects(NewMask))
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return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
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return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
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Op.getValueType(),
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Op.getValueType(),
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Op.getOperand(0)));
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Op.getOperand(0)));
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APInt InMask = NewMask.trunc(OperandBitWidth);
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if (SimplifyDemandedBits(Op.getOperand(0), InMask, Known, TLO, Depth+1))
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if (SimplifyDemandedBits(Op.getOperand(0), InMask, Known, TLO, Depth+1))
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return true;
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return true;
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assert(!Known.hasConflict() && "Bits known to be one AND zero?");
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assert(!Known.hasConflict() && "Bits known to be one AND zero?");
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Known = Known.zext(BitWidth);
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Known = Known.zext(BitWidth);
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Known.Zero |= NewBits;
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Known.Zero.setBitsFrom(OperandBitWidth);
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break;
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break;
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}
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}
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case ISD::SIGN_EXTEND: {
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case ISD::SIGN_EXTEND: {
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EVT InVT = Op.getOperand(0).getValueType();
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unsigned InBits = Op.getOperand(0).getValueType().getScalarSizeInBits();
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unsigned InBits = InVT.getScalarSizeInBits();
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APInt InMask = APInt::getLowBitsSet(BitWidth, InBits);
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APInt InSignBit = APInt::getOneBitSet(BitWidth, InBits - 1);
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APInt NewBits = ~InMask & NewMask;
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// If none of the top bits are demanded, convert this into an any_extend.
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// If none of the top bits are demanded, convert this into an any_extend.
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if (NewBits == 0)
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if (NewMask.getActiveBits() <= InBits)
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return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
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return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
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Op.getValueType(),
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Op.getValueType(),
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Op.getOperand(0)));
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Op.getOperand(0)));
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// Since some of the sign extended bits are demanded, we know that the sign
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// Since some of the sign extended bits are demanded, we know that the sign
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// bit is demanded.
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// bit is demanded.
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APInt InDemandedBits = InMask & NewMask;
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APInt InDemandedBits = NewMask.trunc(InBits);
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InDemandedBits |= InSignBit;
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InDemandedBits.setBit(InBits - 1);
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InDemandedBits = InDemandedBits.trunc(InBits);
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if (SimplifyDemandedBits(Op.getOperand(0), InDemandedBits, Known, TLO,
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if (SimplifyDemandedBits(Op.getOperand(0), InDemandedBits, Known, TLO,
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Depth+1))
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Depth+1))
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return true;
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return true;
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Known = Known.zext(BitWidth);
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assert(!Known.hasConflict() && "Bits known to be one AND zero?");
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// If the sign bit is known one, the top bits match.
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Known = Known.sext(BitWidth);
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// If the sign bit is known zero, convert this to a zero extend.
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// If the sign bit is known zero, convert this to a zero extend.
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if (Known.Zero.intersects(InSignBit))
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if (Known.isNonNegative())
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return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ZERO_EXTEND, dl,
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return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ZERO_EXTEND, dl,
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Op.getValueType(),
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Op.getValueType(),
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Op.getOperand(0)));
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Op.getOperand(0)));
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// If the sign bit is known one, the top bits match.
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if (Known.One.intersects(InSignBit)) {
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Known.One |= NewBits;
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assert((Known.Zero & NewBits) == 0);
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} else { // Otherwise, top bits aren't known.
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assert((Known.One & NewBits) == 0);
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assert((Known.Zero & NewBits) == 0);
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}
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break;
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break;
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}
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}
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case ISD::ANY_EXTEND: {
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case ISD::ANY_EXTEND: {
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