From d2b2ad093c3b4bc5205a4e9b407fde01d0649cc8 Mon Sep 17 00:00:00 2001 From: Dale Johannesen Date: Thu, 28 Oct 2010 01:05:37 +0000 Subject: [PATCH] Ahem. Add rest of D and Q registers to ARM inline asm handling. llvm-svn: 117517 --- clang/lib/Basic/Targets.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index ad7994919754..5ed285dcd74c 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -1891,9 +1891,12 @@ const char * const ARMTargetInfo::GCCRegNames[] = { // Double registers "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", + "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", + "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", // Quad registers - "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7" + "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", + "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" }; void ARMTargetInfo::getGCCRegNames(const char * const *&Names,