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Ahem. Add rest of D and Q registers to ARM inline asm handling. 

llvm-svn: 117517
This commit is contained in:
Dale Johannesen 2010-10-28 01:05:37 +00:00
parent bcf1217e28
commit d2b2ad093c
1 changed files with 4 additions and 1 deletions
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5
clang/lib/Basic/Targets.cpp
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@ -1891,9 +1891,12 @@ const char * const ARMTargetInfo::GCCRegNames[] = {
// Double registers
"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
"d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
"d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
"d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
// Quad registers
"q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7"
"q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
"q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
};
void ARMTargetInfo::getGCCRegNames(const char * const *&Names,