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[PowerPC] Fix sjlj pseduo instructions to use G8RC_NOX0 register class 

The the following instructions:
  - LD/LWZ (expanded from sjLj pseudo-instructions)
  - LXVL/LXVLL vector loads
  - STXVL/STXVLL vector stores
all require G8RC_NO0X class registers for RA.

Differential Revision: https://reviews.llvm.org/D29289

Committed for Lei Huang

llvm-svn: 293769
This commit is contained in:
Kit Barton 2017-02-01 14:33:57 +00:00
parent 816ae4b0df
commit d26978796e
2 changed files with 32 additions and 2 deletions
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5
llvm/lib/Target/PowerPC/PPCInstrInfo.td
View File

@ -770,9 +770,10 @@ def spe2dis : Operand<iPTR> { // SPE displacement where the imm is 2-aligned.
}
// A single-register address. This is used with the SjLj
// pseudo-instructions.
// pseudo-instructions which tranlates to LD/LWZ. These instructions requires
// G8RC_NOX0 registers.
def memr : Operand<iPTR> {
let MIOperandInfo = (ops ptr_rc:$ptrreg);
let MIOperandInfo = (ops ptr_rc_nor0:$ptrreg);
}
def PPCTLSRegOperand : AsmOperandClass {
let Name = "TLSReg"; let PredicateMethod = "isTLSReg";

29
llvm/test/CodeGen/PowerPC/sjlj_no0x.ll Normal file
View File

@ -0,0 +1,29 @@
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -verify-machineinstrs | FileCheck %s
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
; Function Attrs: noinline nounwind
define void @_Z23BuiltinLongJmpFunc1_bufv() #0 {
entry:
call void @llvm.eh.sjlj.longjmp(i8* bitcast (void ()* @_Z23BuiltinLongJmpFunc1_bufv to i8*))
unreachable
; CHECK: @_Z23BuiltinLongJmpFunc1_bufv
; CHECK: addis [[REG:[0-9]+]], 2, .LC0@toc@ha
; CHECK: ld 31, 0([[REG]])
; CHECK: ld [[REG2:[0-9]+]], 8([[REG]])
; CHECK-DAG: ld 1, 16([[REG]])
; CHECK-DAG: ld 30, 32([[REG]])
; CHECK-DAG: ld 2, 24([[REG]])
; CHECK-DAG: mtctr [[REG2]]
; CHECK: bctr
return: ; No predecessors!
ret void
}
; Function Attrs: noreturn nounwind
declare void @llvm.eh.sjlj.longjmp(i8*) #1