Generate correct asm info for mingw and cygwin ARM targets.

http://reviews.llvm.org/D11075

Patch by Martell Malone
Reviewed by Reid Kleckner

llvm-svn: 242123
This commit is contained in:
Yaron Keren 2015-07-14 05:51:05 +00:00
parent ea671fbdff
commit d1ba2d9d8b
5 changed files with 38 additions and 14 deletions

View File

@ -277,10 +277,10 @@ static MCAsmInfo *createARMMCAsmInfo(const MCRegisterInfo &MRI,
MCAsmInfo *MAI;
if (TheTriple.isOSDarwin() || TheTriple.isOSBinFormatMachO())
MAI = new ARMMCAsmInfoDarwin(TheTriple);
else if (TheTriple.isWindowsItaniumEnvironment())
MAI = new ARMCOFFMCAsmInfoGNU();
else if (TheTriple.isWindowsMSVCEnvironment())
MAI = new ARMCOFFMCAsmInfoMicrosoft();
else if (TheTriple.isOSWindows())
MAI = new ARMCOFFMCAsmInfoGNU();
else
MAI = new ARMELFMCAsmInfo(TheTriple);

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@ -1,4 +1,8 @@
; RUN: llc -mtriple=thumbv7-windows-itanium -mcpu=cortex-a9 -o - %s | FileCheck %s
; RUN: llc -mtriple=thumbv7-windows-itanium -mcpu=cortex-a9 -o - %s \
; RUN: | FileCheck %s -check-prefix CHECK-WIN
; RUN: llc -mtriple=thumbv7-windows-gnu -mcpu=cortex-a9 -o - %s \
; RUN: | FileCheck %s -check-prefix CHECK-GNU
define float @function(float %f, float %g) nounwind {
entry:
@ -6,5 +10,7 @@ entry:
ret float %h
}
; CHECK: vadd.f32 s0, s0, s1
; CHECK-WIN: vadd.f32 s0, s0, s1
; CHECK-GNU: vadd.f32 s0, s0, s1

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@ -1,5 +1,10 @@
; RUN: not llc -mtriple=armv7-windows-itanium -mcpu=cortex-a9 -o /dev/null %s 2>&1 \
; RUN: | FileCheck %s
; RUN: | FileCheck %s -check-prefix CHECK-WIN
; CHECK: does not support ARM mode execution
; RUN: not llc -mtriple=armv7-windows-gnu -mcpu=cortex-a9 -o /dev/null %s 2>&1 \
; RUN: | FileCheck %s -check-prefix CHECK-GNU
; CHECK-WIN: does not support ARM mode execution
; CHECK-GNU: does not support ARM mode execution

View File

@ -1,5 +1,8 @@
; RUN: llc -mtriple thumbv7-windows-itanium -relocation-model pic -filetype asm -o - %s \
; RUN: | FileCheck %s
; RUN: | FileCheck %s -check-prefix CHECK-WIN
; RUN: llc -mtriple thumbv7-windows-gnu -relocation-model pic -filetype asm -o - %s \
; RUN: | FileCheck %s -check-prefix CHECK-GNU
@external = external global i8
@ -9,8 +12,12 @@ entry:
ret i8 %0
}
; CHECK-LABEL: return_external
; CHECK: movw r0, :lower16:external
; CHECK: movt r0, :upper16:external
; CHECK: ldrb r0, [r0]
; CHECK-WIN-LABEL: return_external
; CHECK-WIN: movw r0, :lower16:external
; CHECK-WIN: movt r0, :upper16:external
; CHECK-WIN: ldrb r0, [r0]
; CHECK-GNU-LABEL: return_external
; CHECK-GNU: movw r0, :lower16:external
; CHECK-GNU: movt r0, :upper16:external
; CHECK-GNU: ldrb r0, [r0]

View File

@ -1,4 +1,8 @@
; RUN: llc -mtriple thumbv7-windows-itanium -o - %s | FileCheck %s
; RUN: llc -mtriple thumbv7-windows-itanium -o - %s \
; RUN: | FileCheck %s -check-prefix CHECK-WIN
; RUN: llc -mtriple thumbv7-windows-gnu -o - %s \
; RUN: | FileCheck %s -check-prefix CHECK-GNU
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @function, i8* null }]
@ -7,6 +11,8 @@ entry:
ret void
}
; CHECK: .section .CRT$XCU,"dr"
; CHECK: .long function
; CHECK-WIN: .section .CRT$XCU,"dr"
; CHECK-WIN: .long function
; CHECK-GNU: .section .ctors,"dw"
; CHECK-GNU: .long function