[LLDB][MIPS] Fix emulation of Instruction for MIPS64R6 target.
Subscribers: jaydeep, bhushan, lldb-commits, slthakur llvm-svn: 309250
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27bcf6a680
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@ -801,7 +801,9 @@ EmulateInstructionMIPS64::GetOpcodeForInstruction(const char *op_name) {
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// Branch instructions
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//----------------------------------------------------------------------
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{"BEQ", &EmulateInstructionMIPS64::Emulate_BXX_3ops, "BEQ rs,rt,offset"},
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{"BEQ64", &EmulateInstructionMIPS64::Emulate_BXX_3ops, "BEQ rs,rt,offset"},
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{"BNE", &EmulateInstructionMIPS64::Emulate_BXX_3ops, "BNE rs,rt,offset"},
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{"BNE64", &EmulateInstructionMIPS64::Emulate_BXX_3ops, "BNE rs,rt,offset"},
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{"BEQL", &EmulateInstructionMIPS64::Emulate_BXX_3ops,
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"BEQL rs,rt,offset"},
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{"BNEL", &EmulateInstructionMIPS64::Emulate_BXX_3ops,
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@ -814,6 +816,7 @@ EmulateInstructionMIPS64::GetOpcodeForInstruction(const char *op_name) {
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{"BALC", &EmulateInstructionMIPS64::Emulate_BALC, "BALC offset"},
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{"BC", &EmulateInstructionMIPS64::Emulate_BC, "BC offset"},
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{"BGEZ", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BGEZ rs,offset"},
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{"BGEZ64", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BGEZ rs,offset"},
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{"BLEZALC", &EmulateInstructionMIPS64::Emulate_Bcond_Link_C,
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"BLEZALC rs,offset"},
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{"BGEZALC", &EmulateInstructionMIPS64::Emulate_Bcond_Link_C,
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@ -828,34 +831,61 @@ EmulateInstructionMIPS64::GetOpcodeForInstruction(const char *op_name) {
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"BNEZALC rs,offset"},
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{"BEQC", &EmulateInstructionMIPS64::Emulate_BXX_3ops_C,
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"BEQC rs,rt,offset"},
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{"BEQC64", &EmulateInstructionMIPS64::Emulate_BXX_3ops_C,
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"BEQC rs,rt,offset"},
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{"BNEC", &EmulateInstructionMIPS64::Emulate_BXX_3ops_C,
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"BNEC rs,rt,offset"},
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{"BNEC64", &EmulateInstructionMIPS64::Emulate_BXX_3ops_C,
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"BNEC rs,rt,offset"},
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{"BLTC", &EmulateInstructionMIPS64::Emulate_BXX_3ops_C,
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"BLTC rs,rt,offset"},
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{"BLTC64", &EmulateInstructionMIPS64::Emulate_BXX_3ops_C,
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"BLTC rs,rt,offset"},
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{"BGEC", &EmulateInstructionMIPS64::Emulate_BXX_3ops_C,
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"BGEC rs,rt,offset"},
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{"BGEC64", &EmulateInstructionMIPS64::Emulate_BXX_3ops_C,
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"BGEC rs,rt,offset"},
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{"BLTUC", &EmulateInstructionMIPS64::Emulate_BXX_3ops_C,
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"BLTUC rs,rt,offset"},
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{"BLTUC64", &EmulateInstructionMIPS64::Emulate_BXX_3ops_C,
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"BLTUC rs,rt,offset"},
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{"BGEUC", &EmulateInstructionMIPS64::Emulate_BXX_3ops_C,
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"BGEUC rs,rt,offset"},
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{"BGEUC64", &EmulateInstructionMIPS64::Emulate_BXX_3ops_C,
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"BGEUC rs,rt,offset"},
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{"BLTZC", &EmulateInstructionMIPS64::Emulate_BXX_2ops_C,
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"BLTZC rt,offset"},
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{"BLTZC64", &EmulateInstructionMIPS64::Emulate_BXX_2ops_C,
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"BLTZC rt,offset"},
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{"BLEZC", &EmulateInstructionMIPS64::Emulate_BXX_2ops_C,
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"BLEZC rt,offset"},
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{"BLEZC64", &EmulateInstructionMIPS64::Emulate_BXX_2ops_C,
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"BLEZC rt,offset"},
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{"BGEZC", &EmulateInstructionMIPS64::Emulate_BXX_2ops_C,
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"BGEZC rt,offset"},
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{"BGEZC64", &EmulateInstructionMIPS64::Emulate_BXX_2ops_C,
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"BGEZC rt,offset"},
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{"BGTZC", &EmulateInstructionMIPS64::Emulate_BXX_2ops_C,
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"BGTZC rt,offset"},
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{"BGTZC64", &EmulateInstructionMIPS64::Emulate_BXX_2ops_C,
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"BGTZC rt,offset"},
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{"BEQZC", &EmulateInstructionMIPS64::Emulate_BXX_2ops_C,
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"BEQZC rt,offset"},
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{"BEQZC64", &EmulateInstructionMIPS64::Emulate_BXX_2ops_C,
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"BEQZC rt,offset"},
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{"BNEZC", &EmulateInstructionMIPS64::Emulate_BXX_2ops_C,
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"BNEZC rt,offset"},
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{"BNEZC64", &EmulateInstructionMIPS64::Emulate_BXX_2ops_C,
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"BNEZC rt,offset"},
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{"BGEZL", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BGEZL rt,offset"},
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{"BGTZ", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BGTZ rt,offset"},
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{"BGTZ64", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BGTZ rt,offset"},
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{"BGTZL", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BGTZL rt,offset"},
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{"BLEZ", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BLEZ rt,offset"},
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{"BLEZ64", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BLEZ rt,offset"},
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{"BLEZL", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BLEZL rt,offset"},
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{"BLTZ", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BLTZ rt,offset"},
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{"BLTZ64", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BLTZ rt,offset"},
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{"BLTZAL", &EmulateInstructionMIPS64::Emulate_Bcond_Link,
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"BLTZAL rt,offset"},
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{"BLTZALL", &EmulateInstructionMIPS64::Emulate_Bcond_Link,
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@ -872,8 +902,11 @@ EmulateInstructionMIPS64::GetOpcodeForInstruction(const char *op_name) {
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{"JALR64", &EmulateInstructionMIPS64::Emulate_JALR, "JALR target"},
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{"JALR_HB", &EmulateInstructionMIPS64::Emulate_JALR, "JALR.HB target"},
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{"JIALC", &EmulateInstructionMIPS64::Emulate_JIALC, "JIALC rt,offset"},
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{"JIALC64", &EmulateInstructionMIPS64::Emulate_JIALC, "JIALC rt,offset"},
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{"JIC", &EmulateInstructionMIPS64::Emulate_JIC, "JIC rt,offset"},
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{"JIC64", &EmulateInstructionMIPS64::Emulate_JIC, "JIC rt,offset"},
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{"JR", &EmulateInstructionMIPS64::Emulate_JR, "JR target"},
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{"JR64", &EmulateInstructionMIPS64::Emulate_JR, "JR target"},
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{"JR_HB", &EmulateInstructionMIPS64::Emulate_JR, "JR.HB target"},
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{"BC1F", &EmulateInstructionMIPS64::Emulate_FP_branch, "BC1F cc, offset"},
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{"BC1T", &EmulateInstructionMIPS64::Emulate_FP_branch, "BC1T cc, offset"},
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@ -1338,12 +1371,14 @@ bool EmulateInstructionMIPS64::Emulate_BXX_3ops(llvm::MCInst &insn) {
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if (!success)
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return false;
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if (!strcasecmp(op_name, "BEQ") || !strcasecmp(op_name, "BEQL")) {
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if (!strcasecmp(op_name, "BEQ") || !strcasecmp(op_name, "BEQL")
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|| !strcasecmp(op_name, "BEQ64") ) {
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if (rs_val == rt_val)
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target = pc + offset;
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else
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target = pc + 8;
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} else if (!strcasecmp(op_name, "BNE") || !strcasecmp(op_name, "BNEL")) {
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} else if (!strcasecmp(op_name, "BNE") || !strcasecmp(op_name, "BNEL")
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|| !strcasecmp(op_name, "BNE64")) {
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if (rs_val != rt_val)
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target = pc + offset;
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else
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@ -1563,22 +1598,26 @@ bool EmulateInstructionMIPS64::Emulate_BXX_2ops(llvm::MCInst &insn) {
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if (!success)
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return false;
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if (!strcasecmp(op_name, "BLTZL") || !strcasecmp(op_name, "BLTZ")) {
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if (!strcasecmp(op_name, "BLTZL") || !strcasecmp(op_name, "BLTZ")
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|| !strcasecmp(op_name, "BLTZ64")) {
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if (rs_val < 0)
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target = pc + offset;
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else
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target = pc + 8;
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} else if (!strcasecmp(op_name, "BGEZL") || !strcasecmp(op_name, "BGEZ")) {
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} else if (!strcasecmp(op_name, "BGEZL") || !strcasecmp(op_name, "BGEZ")
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|| !strcasecmp(op_name, "BGEZ64")) {
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if (rs_val >= 0)
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target = pc + offset;
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else
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target = pc + 8;
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} else if (!strcasecmp(op_name, "BGTZL") || !strcasecmp(op_name, "BGTZ")) {
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} else if (!strcasecmp(op_name, "BGTZL") || !strcasecmp(op_name, "BGTZ")
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|| !strcasecmp(op_name, "BGTZ64")) {
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if (rs_val > 0)
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target = pc + offset;
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else
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target = pc + 8;
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} else if (!strcasecmp(op_name, "BLEZL") || !strcasecmp(op_name, "BLEZ")) {
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} else if (!strcasecmp(op_name, "BLEZL") || !strcasecmp(op_name, "BLEZ")
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|| !strcasecmp(op_name, "BLEZ64")) {
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if (rs_val <= 0)
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target = pc + offset;
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else
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@ -1657,32 +1696,32 @@ bool EmulateInstructionMIPS64::Emulate_BXX_3ops_C(llvm::MCInst &insn) {
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if (!success)
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return false;
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if (!strcasecmp(op_name, "BEQC")) {
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if (!strcasecmp(op_name, "BEQC") || !strcasecmp(op_name, "BEQC64")) {
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if (rs_val == rt_val)
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target = pc + offset;
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else
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target = pc + 4;
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} else if (!strcasecmp(op_name, "BNEC")) {
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} else if (!strcasecmp(op_name, "BNEC") || !strcasecmp(op_name, "BNEC64")) {
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if (rs_val != rt_val)
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target = pc + offset;
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else
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target = pc + 4;
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} else if (!strcasecmp(op_name, "BLTC")) {
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} else if (!strcasecmp(op_name, "BLTC") || !strcasecmp(op_name, "BLTC64")) {
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if (rs_val < rt_val)
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target = pc + offset;
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else
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target = pc + 4;
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} else if (!strcasecmp(op_name, "BGEC")) {
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} else if (!strcasecmp(op_name, "BGEC64") || !strcasecmp(op_name, "BGEC")) {
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if (rs_val >= rt_val)
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target = pc + offset;
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else
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target = pc + 4;
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} else if (!strcasecmp(op_name, "BLTUC")) {
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} else if (!strcasecmp(op_name, "BLTUC") || !strcasecmp(op_name, "BLTUC64")) {
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if (rs_val < rt_val)
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target = pc + offset;
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else
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target = pc + 4;
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} else if (!strcasecmp(op_name, "BGEUC")) {
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} else if (!strcasecmp(op_name, "BGEUC") || !strcasecmp(op_name, "BGEUC64")) {
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if ((uint32_t)rs_val >= (uint32_t)rt_val)
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target = pc + offset;
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else
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@ -1734,32 +1773,32 @@ bool EmulateInstructionMIPS64::Emulate_BXX_2ops_C(llvm::MCInst &insn) {
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if (!success)
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return false;
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if (!strcasecmp(op_name, "BLTZC")) {
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if (!strcasecmp(op_name, "BLTZC") || !strcasecmp(op_name, "BLTZC64")) {
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if (rs_val < 0)
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target = pc + offset;
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else
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target = pc + 4;
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} else if (!strcasecmp(op_name, "BLEZC")) {
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} else if (!strcasecmp(op_name, "BLEZC") || !strcasecmp(op_name, "BLEZC64")) {
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if (rs_val <= 0)
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target = pc + offset;
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else
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target = pc + 4;
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} else if (!strcasecmp(op_name, "BGEZC")) {
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} else if (!strcasecmp(op_name, "BGEZC") || !strcasecmp(op_name, "BGEZC64")) {
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if (rs_val >= 0)
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target = pc + offset;
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else
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target = pc + 4;
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} else if (!strcasecmp(op_name, "BGTZC")) {
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} else if (!strcasecmp(op_name, "BGTZC") || !strcasecmp(op_name, "BGTZC64")) {
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if (rs_val > 0)
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target = pc + offset;
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else
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target = pc + 4;
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} else if (!strcasecmp(op_name, "BEQZC")) {
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} else if (!strcasecmp(op_name, "BEQZC") || !strcasecmp(op_name, "BEQZC64")) {
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if (rs_val == 0)
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target = pc + offset;
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else
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target = pc + 4;
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} else if (!strcasecmp(op_name, "BNEZC")) {
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} else if (!strcasecmp(op_name, "BNEZC") || !strcasecmp(op_name, "BNEZC64")) {
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if (rs_val != 0)
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target = pc + offset;
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else
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